HD64F3687 datasheet(28/504 Pages) RENESAS

28 / 504 page

Rev. 3.00, 05/03, page xxviii of xxx

Table 7.6

Programming Time ..................................................................................................... 99

Table 7.7

Flash Memory Operating States................................................................................ 103

Section 10 Realtime Clock (RTC)

Table 10.1

Pin Configuration.................................................................................................. 138

Table 10.2

Interrupt Source .................................................................................................... 148

Section 11 Timer B1

Table 11.1

Pin Configuration.................................................................................................. 150

Table 11.2

Timer B1 Operating Modes .................................................................................. 153

Section 12 Timer V

Table 12.1

Pin Configuration.................................................................................................. 156

Table 12.2

Clock Signals to Input to TCNTV and Counting Conditions ............................... 159

Section 13 Timer Z

Table 13.1

Timer Z Functions................................................................................................. 170

Table 13.2

Pin Configuration.................................................................................................. 174

Table 13.3

Initial Output Level of FTIOB0 Pin...................................................................... 201

Table 13.4

Output Pins in Reset Synchronous PWM Mode ................................................... 206

Table 13.5

Table 13.6

Output Pins in Complementary PWM Mode ........................................................ 210

Table 13.7

Table 13.8

Section 15 14-Bit PWM

Table 15.1

Pin Configuration.................................................................................................. 240

Section 16 Serial Communication Interface 3 (SCI3)

Table 16.1

Channel Configuration.......................................................................................... 244

Table 16.2

Pin Configuration.................................................................................................. 246

Table 16.3

Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1) ...... 254

Table 16.3

Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2) ...... 255

Table 16.3

Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (3) ...... 256

Table 16.4

Maximum Bit Rate for Each Frequency (Asynchronous Mode) .......................... 257

Table 16.5

Examples of BRR Settings for Various Bit Rates

(Clocked Synchronous Mode) (1)......................................................................... 258

Table 16.5

Examples of BRR Settings for Various Bit Rates

(Clocked Synchronous Mode) (2)......................................................................... 259

Table 16.6

SSR Status Flags and Receive Data Handling ...................................................... 265

Table 16.7

SCI3 Interrupt Requests ........................................................................................ 281

Section 17 I

2C Bus Interface 2 (IIC2)

Table 17.1

2C Bus Interface Pins...........................................................................................287

Table 17.2

Transfer Rate......................................................................................................... 289

Table 17.3

Interrupt Requests ................................................................................................. 315

Table 17.4

Time for Monitoring SCL ..................................................................................... 316

HD64F3687 Datasheet(PDF) 28 Page - Renesas Technology Corp

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