Integrated Circuits Inc.

aP23682/341/170/085 8PIN

Ver 2.5.1

21

May 24 2016



Symbol

Parameter

Min.

Typ.

Max.

Unit

Note

tKD

Key trigger debounce time (long)



16



ms

1

tKD

Key trigger debounce time (long) –

Retrigger during voice playback.



24



ms

1

tKD

Key trigger debounce time (short)



1



ms

1

tKD

Key trigger debounce time (short) –

Retrigger during voice playback.



1.5



ms

1

tSTPW

STOP pulse width (long)



128



ms

1

tSTPW

STOP pulse width (short)



500



μs

1

tAS

Address set-up time

300





ns

tAH

Address hold time

300





ns

tSBTW

SBT stroke pulse width (long)

16





ms

1

tSBTW

SBT stroke pulse width (short)

1





ms

1

tBO

BUSY signal output delay time(long)



24



ms

1

tBO

BUSY signal output delay time(short)



1



ms

1

tCS

Chip select set-up time

100





ns

tCH

Chip select hold time

100





ns

tSCKW

Serial clock pulse width

1





μs

tDS

Data set-up time

100





ns

tDH

Data hold time

100





ns

tSBO

BUSY signal output delay time





2

m

s

tRP

Ramp Up time



160



m

s

tRD

Ramp Down time



160



m

s

tFD

Full signal output delay time





2

m

s

Notes :

The long or short debounce time is selectable as whole chip option during Voice Files Compiling.