ISL6526AEVAL2 datasheet(13/18 Pages) INTERSIL

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FN9055.12

September 30, 2015

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Input Capacitor Selection

Use a mix of input bypass capacitors to control the voltage

overshoot across the MOSFETs. Use small ceramic

capacitors for high frequency decoupling and bulk capacitors

to supply the current needed each time Q1 turns on. Place the

small ceramic capacitors physically close to the MOSFETs

and between the drain of Q1 and the source of Q2.

The important parameters for the bulk input capacitor are the

voltage rating and the RMS current rating. For reliable

operation, select the bulk capacitor with voltage and current

ratings above the maximum input voltage and largest RMS

current required by the circuit. The capacitor voltage rating

should be at least 1.25 times greater than the maximum

input voltage and a voltage rating of 1.5 times is a

conservative guideline. The RMS current rating requirement

for the input capacitor of a buck regulator is approximately

1/2 the DC load current.

The maximum RMS current required by the regulator may be

closely approximated using Equation 15:

For a through hole design, several electrolytic capacitors may

be needed. For surface mount designs, solid tantalum

capacitors can be used, but caution must be exercised with

regard to the capacitor surge current rating. These capacitors

must be capable of handling the surge-current at power-up.

Some capacitor series available from reputable manufacturers

are surge current tested.

MOSFET Selection/Considerations

The ISL6526, ISL6526A require two N-Channel power

MOSFETs. These should be selected based upon rDS(ON),

gate supply requirements, and thermal management

requirements.

In high-current applications, the MOSFET power dissipation,

package selection and heatsink are the dominant design

factors. The power dissipation includes two loss components;

conduction loss and switching loss. The conduction losses are

the largest component of power dissipation for both the upper

and the lower MOSFETs. These losses are distributed

between the two MOSFETs according to duty factor. The

switching losses seen when sourcing current will be different

from the switching losses seen when sinking current. When

sourcing current, the upper MOSFET realizes most of the

switching losses. The lower switch realizes most of the

switching losses when the converter is sinking current (see

Equations 16 and 17). These equations assume linear

voltage-current transitions and do not adequately model

power loss due the reverse-recovery of the upper and lower

MOSFET’s body diode. The gate-charge losses are

dissipated by the ISL6526, ISL6526A and don't heat the

MOSFETs. However, large gate-charge increases the

switching interval, tSW which increases the MOSFET

switching losses. Ensure that both MOSFETs are within their

maximum junction temperature at high ambient temperature

by calculating the temperature rise according to package

thermal-resistance specifications. A separate heatsink may be

necessary depending upon MOSFET power, package type,

ambient temperature and air flow.

Given the reduced available gate bias voltage (5V), logic-level

or sub-logic-level transistors should be used for both

N-MOSFETs. Caution should be exercised with devices

exhibiting very low VGS(ON) characteristics. The shoot-through

protection present aboard the ISL6526, ISL6526A may be

circumvented by these MOSFETs if they have large parasitic

impedances and/or capacitances that would inhibit the gate of

the MOSFET from being discharged below its threshold level

before the complementary MOSFET is turned on.

Bootstrap Component Selection

External bootstrap components, a diode and capacitor, are

required to provide sufficient gate enhancement to the upper

MOSFET. The internal MOSFET gate driver is supplied by the

external bootstrap circuitry, as shown in Figure 7. The boot

capacitor, CBOOT, develops a floating supply voltage

referenced to the PHASE pin. This supply is refreshed each

cycle, when DBOOT conducts, to a voltage of CPVOUT less the

boot diode drop, VD, plus the voltage rise across QLOWER.

IRMS

MAX

VOUT

VIN

--------------

IOUT

MAX

------

VIN VOUT

–

Lfs



-----------------------------

VOUT

VIN

--------------















(EQ. 15)

PLOWER = Io2 x rDS(ON) x (1 - D)

Losses while Sourcing Current

PUPPER

rDS ON





--- Io



VIN



tSW fs



(EQ. 16)

Where: D is the duty cycle = VOUT/VIN,

tSW is the combined switch ON and OFF time, and

fs is the switching frequency.

Losses while Sinking Current

PLOWER

rDS ON





–





--- Io



VIN



tSW fs



PUPPER = Io2 x rDS(ON) x D

(EQ. 17)

ISL6526,

GND

LGATE

UGATE

PHASE

BOOT

VIN

NOTE:

VG-S = VCC

CBOOT

DBOOT

QUPPER

QLOWER

FIGURE 7. UPPER GATE DRIVE BOOTSTRAP

VG-S = VCC -VD

CPVOUT

ISL6526A

ISL6526, ISL6526A

ISL6526AEVAL2 Datasheet(PDF) 13 Page - Intersil Corporation

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