October 1994

11

Philips Semiconductors

Product specification

Satellite sound circuit with noise reduction

TDA8741; TDA8741H

Secondary channels 1 and 2 - PLL FM demodulators

free running frequency PLL1

−

10.7

−

MHz

free running frequency PLL2

−

10.52

−

MHz

lock range of PLLs

note 3

10

−

11.5

MHz

series resistance for optimum

frequency response adjustment

0

0.68

2.2

k

Ω

PLL output voltage pins 40 and

42 (36 and 38) (RMS value)

pins to be left open-circuit

−

9

−

mV

∆V

CDCL,CDCR

spread of PLL output voltage

over lock range

−−

±1dB

Secondary channels - overall performance of LPF and NR (output selectors in position 1)

output resistance for 75

µs

de-emphasis pins 36 and 32 (32

and 28)

1.9

2.3

2.6

k

Ω

input resistance of output

amplifiers pins 35 and 33

(31 and 29)

95

150

200

k

Ω

output voltage level pins 25 and

24 (21 and 20)

note 4

−8

−6

−4

dBV

UBS

unbalance voltage outputs

pins 25 and 24 (21 and 20)

note 4

−1

−

+1

dB

THD

total harmonic distortion

note 4

−

0.1

0.5

%

S/N(A)

signal-to-noise ratio

A-weighted; note 4

72

80

−

dB

output resistance pins 25 and 24

(21 and 20)

note 4

92

125

150

Ω

mute attenuation

output selector in

position 6; note 4

74

−−

dB

crosstalk attenuation between

secondary channels

note 5

−

74

−

dB

α

M/S

crosstalk attenuation from main

channel to secondary

note 6

−

74

−

dB

DC offset voltage on

attack/recovery capacitors

pins 29, 39 (25, 35)

all PLLs locked;

∆f = 0

14

16

20

mV

SVRR

supply voltage ripple rejection

−

25

−

dB

Secondary channels - low-pass filter pins 38 and 30 (34 and 26)

50 kHz frequency response

with respect to 1 kHz

note 7

−25

−16

−9dB

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

V

RECTL RECTR 50 kHz

()

,

V

RECTL RECTR 1 kHz

()

,

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