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LM33-LSG Datasheet(PDF) 8 Page - Pixart Imaging Inc.

Part # LM33-LSG
Description  Optical Gaming Navigation Chip
PDF  19 Pages
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Manufacturer  PIXART [Pixart Imaging Inc.]
Direct Link  http://www.pixart.com.tw
Logo PIXART - Pixart Imaging Inc.

LM33-LSG Datasheet(HTML) 8 Page - Pixart Imaging Inc.

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Version 1.40 |12 Aug 2016 | 31005AEN
PixArt Imaging Inc. http://www.pixart.com
All rights reserved. Any portion in this paper shall not be reproduced, copied, or transformed to any other forms without permission.
PixArt Imaging Inc.
PMW3325DB-TWV1 General Datasheet
Optical Gaming Navigation Chip
2.5
AC Characteristics
Table 6. AC Electrical Specifications
Parameters
Symbol
Min.
Typ.
Max.
Unit Conditions
Motion Delay After Reset
tMOT-RST
50
ms
From reset to valid motion,
assuming motion is present
Shutdown
tSTDWN
500
s
From Shutdown mode active to low
current
Wake up from Shutdown
tWAKEUP
50
60
ms
From Shutdown mode inactive to
valid motion.
Notes: A RESET must be asserted
after a shutdown. Refer to section
“Notes on Shutdown”, also note
tMOT-RST.
SDIO Output Rise Time
tr-SDIO
50
ns
CL = 100pF
SDIO Output Fall Time
tf-SDIO
50
ns
CL = 100pF
SDIO Output Delay After SCLK
tDLY-SDIO
90
ns
From SCLK falling edge to SDIO
output data valid, no load condition
SDIO Output Hold Time
thold- SDIO
200
ns
Data held until next falling SCLK
edge
SDIO input Hold Time
thold- SDIO input
200
ns
Amount of time data is valid after
SCLK rising edge
SDIO input Setup Time
tsetup- SDIO input
120
ns
From data valid to SCLK rising edge
SPI Time Between Write
Commands
tSWW
45
s
From rising SCLK for last bit of the
first data byte, to rising SCLK for
last bit of the second data byte.
SPI Time Between Write And
Read Commands
tSWR
45
s
From rising SCLK for last bit of the
1st data byte, to rising SCLK for last
bit of the second address byte
SPI Time Between Read And
Subsequent Commands
tSRW
tSRR
20
s
From rising SCLK for last bit of the
1st data byte, to falling SCLK for the
1st bit of data being read.
SPI Read Address-Data Delay
tSRAD
35
s
From rising SCLK for last bit of the
address byte, to falling SCLK for the
1st bit of data being read.
NCS Inactive After Motion
Burst
tBEXIT
500
ns
Minimum NCS inactive time after
motion burst before next SPI usage
NCS To SCLK Active
tNCS-SCLK
120
ns
From last NCS falling edge to 1st
SCK rising edge.
SCLK To NCS Inactive SDIO
Write
tSCLK-NCS write
120
ns
From last SCLK falling edge to NCS
rising edge, for valid SDIO data
transfer



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