HMC7229LS6 datasheet(13/16 Pages) AD

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HMC7229LS6

Data Sheet

Rev. B | Page 12 of 15

APPLICATIONS INFORMATION

Figure 35 shows the basic connections for operating the

HMC7229LS6 and see the Theory of Operation section for

additional details. The RF input and RF output are ac-coupled

by the internal dc block capacitors. To avoid damaging the

HMC7229LS6, follow the recommended bias sequencing

during power-up and power-down.

The gate bias of the HMC7229LS6 is supplied by using either

the VGG1 pin or the VGG2 pin. While applying drain bias to the

HMC7229LS6, all of the VDD1, VDD2, VDD3, and VDD4 pins must

be used.

RECOMMENDED BIAS SEQUENCE

During Power-Up

The recommended bias sequence during power-up is the

following:

1. Connect the GND pin to ground.

2. Set VGGx to −2 V.

3. Set VDDx to 6 V.

4. Increase VGGx to achieve a typical IDD = 1200 mA.

5. Apply the RF signal.

During Power-Down

The recommended bias sequence during power-down is the

following:

1. Turn the RF signal off.

2. Decrease VGGx to −2 V to achieve a typical IDD = 0 mA.

3. Decrease VDDx to 0 V.

4. Increase VGGx to 0 V.

The bias conditions previously listed (VDDx = 6 V, IDD = 1200 mA),

are the recommended operating point to get optimum

performance. The data used in this data sheet was taken with

the recommended bias condition. When using the HMC7229LS6

with different bias conditions, different performance may result

than what is shown in the Typical Performance Characteristics

section.

The VDET and VREF pins are the output pins for the internal

power detector. The VDET pin is the dc voltage output pin that

represents the RF output power rectified by the internal diode,

which is biased through an external resistor.

The VREF pin is the dc voltage output pin that represents the

reference diode voltage, which is biased through an external

resistor. This voltage then compensates for the temperature

variation effects on both diodes. A typical circuit is shown in

the Typical Application Circuit section that reads out the output

voltage and represents the RF output power shown in Figure 35.

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