Layout Considerations

Attention must be given to board layout when using LM5111.

Some important considerations include:

1.

A Low ESR/ESL capacitor must be connected close to

the IC and between the V

high peak currents being drawn from V

of the MOSFET.

2.

Proper grounding is crucial. The drivers need a very low

impedance path for current return to ground avoiding

inductive loops. The two paths for returning current to

ground are a) between LM5111 V

of the circuit that controls the driver inputs, b) between

LM5111 V

being driven. All these paths should be as short as

possible to reduce inductance and be as wide as pos-

sible to reduce resistance. All these ground paths should

be kept distinctly separate to avoid coupling between the

high current output paths and the logic signals that drive

the LM5111. A good method is to dedicate one copper

plane in a multi-layered PCB to provide a common

ground surface.

3.

With the rise and fall times in the range of 10 ns to 30 ns,

care is required to minimize the lengths of current car-

rying conductors to reduce their inductance and EMI

from the high di/dt transients generated by the LM5111.

4.

The LM5111 SOIC footprint is compatible with other

industry standard drivers including the TC4426/27/28

and UCC27323/4/5.

5.

If either channel is not being used, the respective input

pin (IN_A or IN_B) should be connected to either V

V

Thermal Performance

INTRODUCTION

The primary goal of thermal management is to maintain the

integrated circuit (IC) junction temperature (T

below a

specified maximum operating temperature to ensure reliabil-

ity. It is essential to estimate the maximum T

nents in worst case operating conditions. The junction tem-

perature is estimated based on the power dissipated in the

IC and the junction to ambient thermal resistance

θ

IC package in the application board and environment. The

θ

the printed circuit board design and the operating environ-

ment.

DRIVE POWER REQUIREMENT CALCULATIONS IN

LM5111

The LM5111 dual low side MOSFET driver is capable of

sourcing/sinking 3A/5A peak currents for short intervals to

drive a MOSFET without exceeding package power dissipa-

tion limits. High peak currents are required to switch the

MOSFET gate very quickly for operation at high frequencies.

The schematic above shows a conceptual diagram of the

LM5111 output and MOSFET load. Q1 and Q2 are the

switches within the gate driver. R

the external MOSFET, and C

tance of the MOSFET. The gate resistance Rg is usually very

small and losses in it can be neglected. The equivalent gate

capacitance is a difficult parameter to measure since it is the

combination of C

(gate to drain capacitance). Both of these MOSFET capaci-

tances are not constants and vary with the gate and drain

voltage. The better way of quantifying gate capacitance is

the total gate charge Q

charge required by C

voltage V

Assuming negligible gate resistance, the total power dissi-

pated in the MOSFET driver due to gate charge is approxi-

mated by

P

Where

F

For example, consider the MOSFET MTD6N15 whose gate

charge specified as 30 nC for V

The power dissipation in the driver due to charging and

discharging of MOSFET gate capacitances at switching fre-

quency of 300 kHz and V

P

If both channels of the LM5111 are operating at equal fre-

quency with equivalent loads, the total losses will be twice as

this value which is 0.216W.

In addition to the above gate charge power dissipation, -

transient power is dissipated in the driver during output

transitions. When either output of the LM5111 changes state,

current will flow from V

time through the output totem-pole N and P channel

MOSFETs. The final component of power dissipation in the

driver is the power associated with the quiescent bias cur-

rent consumed by the driver input stage and Under-voltage

lockout sections.

Characterization of the LM5111 provides accurate estimates

of the transient and quiescent power dissipation compo-

nents. At 300 kHz switching frequency and 30 nC load used

in the example, the transient power will be 8 mW. The 1 mA

nominal quiescent current and 12V V

12 mW typical quiescent power.

Therefore the total power dissipation

P

20112307

FIGURE 2.

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