ADuCM331WDCPZ datasheet(8/16 Pages) AD

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ADuCM330/ADuCM331

Data Sheet

Rev. C | Page 8 of 16

TA = −40°C to +115°C

TA = +115°C to

+125°C1

Parameter

Test Conditions/Comments

Min

Typ

Max

Typ

Unit

LIN AC PARAMETERS1

Bus load conditions (CBUS||RBUS):

1 nF||1 kΩ, 6.8 nF||660 Ω, 10 nF||500 Ω

Duty Cycle 1

0.396

THREC(MAX) = 0.744 × VBAT

THDOM(MAX) = 0.581 × VBAT

VSUP = 7.0 V to 18 V, tBIT = 50 µs

D1 = tBUS_REC(MIN)/(2 × tBIT)

Duty Cycle 2

0.581

THREC(MIN) = 0.284 × VBAT

THDOM(MIN) = 0.422 × VBAT

VSUP = 7.0 V to 18 V, tBIT = 50 µs

D2 = tBUS_REC(MAX)/(2 × tBIT)

D322

THREC(MAX) = 0.778 × VBAT

0.417

THDOM(MAX) = 0.616 × VBAT

VDD = 7.0 V to 18 V

tBIT = 96 µs

D3 = tBUS_REC(MIN)/(2 × tBIT)

D422

THREC(MIN) = 0.389 × VBAT

0.590

THDOM(MIN) = 0.251 × VBAT

VDD = 7.0 V to 18 V

tBIT = 96 µs

D4 = tBUS_REC(MAX)/(2 × tBIT)

tRX_PDR22

Propagation delay of receiver

µs

tRX_SYM22

Symmetry of receiver propagation

delay rising edge, with respect to

falling edge (tRX_SYM = tRF_PDR − tRX_PDF)

−2

µs

PACKAGE THERMAL

SPECIFICATIONS

Thermal Impedance (θJA)23

JEDEC 4-layer board

°C/W

POWER REQUIREMENTS

Power Supply Voltages

VDD (Pin 26)

3.6

DVDD33 (Pin 21)

3.3

AVDD18 (Pin 19)

1.88

DVDD18 (Pin 22)

1.88

POWER CONSUMPTION

IDD (Processor Normal

Mode)24

CD0 (PCLK = 16 MHz), 16 MHz 1% mode,

ADCs off, reference buffer off, executing

code from program flash

CD1 (PCLK = 8 MHz), 16 MHz 1% mode,

ADCs off, reference buffer off, executing

code from program flash

CD0 (PCLK = 16 MHz), 16 MHz 1% mode,

ADCs on, reference buffer on, executing

code from program flash

9.5

18.5

IDD (Processor Powered

Down)

Precision oscillator off, ADC off,

external LIN master pull-up resistor

present, measured with wake-up and

watchdog timers clocked from low

power oscillator, maximum value is at

105°C, and VDD = 18 V

100

µA

IDD LIN

500

µA

IDD IADC

Gain = 4, 8, or 16

700

µA

Gain = 32 or 64

800

µA

LPM, gain = 64

350

µA

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