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LM80 Datasheet(PDF) 24 Page - National Semiconductor (TI) |
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LM80 Datasheet(HTML) 24 Page - National Semiconductor (TI) |
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24 / 29 page  Functional Description (Continued) 12.4 Interrupt Status Register 1 — Address 01h Power on default <7:0> = 0000 0000 binary Bit Name Read/Write Description 0 IN0 Read Only A one indicates a High or Low limit has been exceeded. 1 IN1 Read Only A one indicates a High or Low limit has been exceeded. 2 IN2 Read Only A one indicates a High or Low limit has been exceeded. 3 IN3 Read Only A one indicates a High or Low limit has been exceeded. 4 IN4 Read Only A one indicates a High or Low limit has been exceeded. 5 IN5 Read Only A one indicates a High or Low limit has been exceeded. 6 IN6 Read Only A one indicates a High or Low limit has been exceeded. 7 INT_IN Read Only A zero indicates that a Low has been detected on the INT_IN. 12.5 Interrupt Status Register 2 — Address 02h Power on default <7:0> = 0000 0000 binary Bit Name Read/Write Description 0 Hot Temperature Read Only A one indicates a High or Low limit has been exceeded. Only “One-Time Interrupt” and “Default Interrupt” modes are supported. The mode is set by bit-6 of the Interrupt Mask Register 2. 1 BTI Read Only A one indicates that an interrupt has occurred from the Board Temperature Interrupt (BTI) input pin. BTI can be tied to the OS output of multiple LM75 chips. 2 FAN1 Read Only A one indicates that a fan count limit has been exceeded. 3 FAN2 Read Only A one indicates that a fan count limit has been exceeded. 4 CI (Chassis Intrusion) Read Only A one indicates CI (Chassis Intrusion) has gone high. 5 OS bit Read Only A one indicates a High or a Low OS Temperature limit has been exceed. Only comparator mode is supported. Only “One-Time Interrupt” and “Default Interrupt” modes are supported. The mode is set by bit-7 of the Interrupt Mask Register 2. 6 Reserved Read Only 7 Reserved Read Only 12.6 Interrupt Mask Register 1 — Address 03h Power on default <7:0> = 0000 0000 binary Bit Name Read/ Write Description 0 IN0 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 1 IN1 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 2 IN2 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 3 IN3 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 4 IN4 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 5 IN5 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 6 IN6 Read/Write A one disables the corresponding interrupt status bit for INT interrupt. 7 INT_IN Read/Write A one disables the corresponding interrupt status bit for INT interrupt. www.national.com 24 |
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