X1288 datasheet(13/31 Pages) XICOR

13 / 31 page

13 of 31

REV 1.1.30 3/24/04

www.xicor.com

Preliminary Information

X1288

ALARM REGISTERS

There are two alarm registers whose contents mimic the

contents of the RTC register, but add enable bits and

exclude the 24 hour time selection bit. The enable bits

specify which registers to use in the comparison between

the Alarm and Real Time Registers. For example:

– Setting the Enable Month bit (EMOn*) bit in combina-

tion with other enable bits and a speciﬁc alarm time,

the user can establish an alarm that triggers at the

same time once a year.

*n = 0 for Alarm 0: N = 1 for Alarm 1

When there is a match, an alarm ﬂag is set. The occur-

rence of an alarm can be determined by polling the

AL0 and AL1 bits or by enabling the IRQ output, using

it as hardware ﬂag.

The alarm enable bits are located in the MSB of the

particular register. When all enable bits are set to ‘0’,

there are no alarms.

– The user can set the X1288 to alarm every Wednes-

day at 8:00 AM by setting the EDWn*, the EHRn*

and EMNn* enable bits to ‘1’ and setting the DWAn*,

HRAn* and MNAn* Alarm registers to 8:00 AM

Wednesday.

–A daily alarm for 9:30PM results when the EHRn*

and EMNn* enable bits are set to ‘1’ and the HRAn*

and MNAn* registers are set to 9:30 PM.

*n = 0 for Alarm 0: N = 1 for Alarm 1

REAL TIME CLOCK REGISTERS

Clock/Calendar Registers (SSEC, SC, MN, HR, DT,

MO, YR)

These registers depict BCD representations of the

time. As such, SSEC (1/100 Second) range from 00 to

99, SC (Seconds) and MN (Minutes) range from 00 to

59, HR (Hour) is 1 to 12 with an AM or PM indicator

(H21 bit) or 0 to 23 (with MIL=1), DT (Date) is 1 to 31,

MO (Month) is 1 to 12, YR (Year) is 0 to 99. The SSEC

Date of the Week Register (DW)

This register provides a Day of the Week status and

uses three bits DY2 to DY0 to represent the seven days

of the week. The counter advances in the cycle 0-1-2-

3-4-5-6-0-1-2-… The assignment of a numerical value

to a speciﬁc day of the week is arbitrary and may be

decided by the system software designer. The default

value is deﬁned as ‘0’.

24 Hour Time

If the MIL bit of the HR register is 1, the RTC uses a

24-hour format. If the MIL bit is 0, the RTC uses a 12-

hour format and H21 bit functions as an AM/PM indica-

tor with a ‘1’ representing PM. The clock defaults to

standard time with H21=0.

000F

Alarm1

(EEPROM)

Y2K1

Read-only - Default = 20h

20h

000E

DWA1

EDW1

DY2

DY1

DY0

0-6

00h

000D

YRA1

Unused - Default = RTC Year value (No EEPROM) - Future expansion

000C

MOA1

EMO1

A1G20

A1G13

A1G12

A1G11

A1G10

1-12

00h

000B

DTA1

EDT1

A1D21

A1D20

A1D13

A1D12

A1D11

A1D10

1-31

00h

000A

HRA1

EHR1

A1H21

A1H20

A1H13

A1H12

A1H11

A1H10

0-23

00h

0009

MNA1

EMN1

A1M22

A1M21

A1M20

A1M13

A1M12

A1M11

A1M10

0-59

00h

0008

SCA1

ESC1

A1S22

A1S21

A1S20

A1S13

A1S12

A1S11

A1S10

0-59

00h

0007

Alarm0

(EEPROM)

Y2K0

Read-only - Default = 20h

20h

0006

DWA0

EDW0

DY2

DY1

DY0

0-6

00h

0005

YRA0

Unused - Default = RTC Year value (No EEPROM) – Future expansion

0004

MOA0

EMO0

A0G20

A0G13

A0G12

A0G11

A0G10

1-12

00h

0003

DTA0

EDT0

A0D21

A0D20

A0D13

A0D12

A0D11

A0D10

1-31

00h

0002

HRA0

EHR0

A0H21

A0H20

A0H13

A0H12

A0H11

A0H10

0-23

00h

0001

MNA0

EMN0

A0M22

A0M21

A0M20

A0M13

A0M12

A0M11

A0M10

0-59

00h

0000

SCA0

ESC0

A0S22

A0S21

A0S20

A0S13

A0S12

A0S11

A0S10

0-59

00h

Table 1. Clock/Control Memory Map (Continued)

Addr.

Type

Reg

Name

Bit

Range

54321

(optional)

X1288 Datasheet(PDF) 13 Page - Xicor Inc.

X1288 Datasheet(HTML) 13 Page - Xicor Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Datasheet Download

Link URL