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CDC7005 Datasheet(PDF) 13 Page - Texas Instruments |
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CDC7005 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 29 page ![]() CDC7005 3.3V HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER SCAS685E − DECEMBER 2002 − REVISED NOVEMBER 2004 13 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, VCC, AVCC −0.5 V to 4.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (see Note 4) −0.5 V to VCC + 0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO (see Note 4) −0.5 V to VCC + 0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current (VI < 0, VI > VCC) ±20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current for LVPECL outputs (0 < VO < VCC) −50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous output current, IO ±50 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum junction temperature, TJ 125 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note 5): ZVA package 54 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range Tstg −65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 4. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 5. The package thermal impedance is calculated in accordance with JESD 51 (no airflow condition) and JEDEC2S2P (high-k board). The total for power consumption (VCC x ICC) includes device and termination power consumptions, see Figure 5. recommended operating conditions MIN NOM MAX UNIT Supply voltage, VCC 3 3.3 3.6 V Operating free-air temperature, TA −40 85 °C Low-level input voltage LVCMOS, VIL 0.3 VCC V High-level input voltage LVCMOS, VIH 0.7 VCC V Input threshold voltage LVCMOS, VIT 0.5 VCC V High-level output current LVCMOS, IOH −6 mA Low-level output current LVCMOS, IOL 6 mA Input voltage range LVCMOS, VI 0 3.6 V Low-level input voltage LVPECL, VIL VCC−1.81 VCC−1.475 V High-level input voltage LVPECL, VIH VCC−1.26 VCC−0.88 V |
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