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ZSSC4151 Datasheet(PDF) 8 Page - Integrated Device Technology

Part # ZSSC4151
Description  Automotive Sensor Signal Conditioner
PDF  13 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ZSSC4151 Datasheet(HTML) 8 Page - Integrated Device Technology

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ZSSC4151 Datasheet
© 2016 Integrated Device Technology, Inc.
8
April 20, 2016
2.4.
Interface Characteristics and Nonvolatile Memory
Table 2.4
Interface Characteristics and Nonvolatile Memory
Note: See important table notes at the end of the table.
No.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
2.4.1.
I
2CTM Interface
2.4.1.1
I
2C™ voltage level HIGH 1)
VI2C_HIGH
0.5
VDDA
2.4.1.2
I
2C™ voltage level LOW 1)
VI2C_LOW
0.2
VDDA
2.4.1.3
Slave output level LOW
1)
VI2C_LOW_OUT
Open drain, IOL < 4mA
0.1
VDDA
2.4.1.4
SDA load capacitance
1)
CI2C_SDA
400
pF
2.4.1.5
SCL clock frequency
1)
fI2C
400
kHz
2.4.1.6
Internal pull-up resistor
1)
RI2C_PULLUP
25
100
k
Ω
2.4.2.
ZACwire™ One-Wire Interface
(OWI at AOUT pin)
2.4.2.1
OWI voltage level HIGH
1)
VOWI_IN_H
Master to slave
0.75
VDDE
2.4.2.2
OWI voltage level LOW
1)
VOWI_IN_L
Master to slave
0.2
VDDE
2.4.2.3
Slave output level LOW
1)
VOWI_OUT_L
Open drain, IOL
≤ 2mA
0.1
VDDE
2.4.2.4
Start window
1)
tOWI_STARTWIN
100
300
ms
2.4.2.5
Bus free time
tOWI_IDLE
Between stop and next
start
25
µs
2.4.2.6
Hold time start condition
tOWI_START
Valid minimum fclk
25
µs
2.4.2.7
Bit time
tOWI_BIT
Maximum range
20
8000
µs
Typical operating range
40
4000
µs
2.4.2.8
Duty ratio bit ‘0’
tOWI_0
0.125
0.25
0.375
tOWI_BIT
2.4.2.9
Duty ratio bit ‘1’
tOWI_1
0.625
0.75
0.875
tOWI_BIT
2.4.2.10
Hold time stop condition
tOWI_STOP
tOWI_BIT_L is the bit time
of the last valid bit
2
tOWI_BIT_L
2.4.2.11
Bit period deviation
tOWI_BIT_DEV
0.55
1.0
1.5
tOWI_BIT



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