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DAC38RF82 Datasheet(PDF) 21 Page - Texas Instruments |
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DAC38RF82 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 139 page  14-b DAC Control Interface Temp Sensor Clock Distribution RBIAS DACCLK+ DACCLK- RX[4..7]+ RX[4..7]- RX[0..3]+ RX[0..3]- SYSREF+ SYSREF- VDDA18 DACB Gain Low Jitter PLL SYNC1\+ SYNC1\- 0.9 V Ref VDDS18 VDDT1 VDDR18 JTAG ATEST AMUX0/1 IFORCE VSENSE TESTMODE VEE18N VOUT2+ CLKTX+ Divider /2, /3, /4 Multi-band DUC Channel 1 (multi-DUC1) x sin(x) 14-b DAC DACA Gain VOUT1+ x sin(x) I Q I Q I Q I Q NCO 1 NCO 2 NCO 3 NCO 4 Multi-band DUC Channel 2 (multi-DUC2) CLKTX- SYNC2\+ SYNC2\- DACCLKSE VOUT1- VOUT2- 100: 100: VDDTX1 VDDTX18 Copyright © 2016, Texas Instruments Incorporated EXTIO 21 DAC38RF82, DAC38RF89 www.ti.com SLASEA6 – FEBRUARY 2017 Product Folder Links: DAC38RF82 DAC38RF89 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview The DAC38RF82 and DAC38RF89 are high performance, wide bandwidth RF-sampling digital-to-analog (DACs) that are capable of dual channel input data rate up to 3.33 GSPS or single-channel operation with 8-bits up to 9- GSPS. The devices have a low power JESD204B Interface with up to 8 lanes, with a maximum bit rate of 12.5 Gbps. In dual channel operation, the input interface is capable of data rates up to 3.33 GSPS at 12-bits and 2.5 GSPS at 16-bits resolution without interpolation. When used as a complex baseband transmitter with interpolation modes from 2x to 24x, the DAC38RF82 (or DAC38RF89) is capable of synthesizing wideband signals up to 2 GHz bandwidth with 16-bit input resolution and 2.66 GHz bandwidth with 12-bit input resolution. The 8-bit mode allows an input at the full 9 GSPS maximum DAC sample rate and can synthesize wideband signals from 0 to 4.5 GHz. An optional low jitter PLL/VCO simplifies the DAC clock generation by allowing use of a lower frequency reference clock. DAC38RF82 and DAC38RF89 support different VCO frequency ranges, summarized in Device Comparison Table. 8.2 Functional Block Diagrams Figure 24. 12-, 16-Bit Input Mode Block Diagram |
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