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TPS64201DBVR Datasheet(PDF) 12 Page - Texas Instruments |
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TPS64201DBVR Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 24 page ![]() TPS64200,TPS64201 TPS64202,TPS64203 SLVS485 − AUGUST 2003 www.ti.com 12 THEORY OF OPERATION The basic application circuit for the TPS64200 is shown in Figure 1. External component selection is driven by the load requirement. It begins with the selection of the current sense resistor R(ISENSE) followed by the output diode, the inductor L, and the output and input capacitors. The inductor is chosen based on the desired amount of ripple current and switching frequency. The output capacitor is chosen large enough to meet the required output ripple and transient requirements. The ESR of the output capacitor is needed for stability of the converter. Therefore, an output capacitor with a certain amount of ESR is needed for the standard application circuit. See the application information for more details. The input capacitor must be capable of handling the required RMS input current. Setting the Inductor Current Limit The ISENSE pin is connected to an internal current comparator with a threshold of 120 mV/R(ISENSE). The current comparator sets the peak inductor current. As the current limit is intended to protect the external PMOS the limit must not be reached in normal operation. Set the current limit to about 1.3 times the maximum output current or higher if desired. This takes into account a certain amount of inductor current ripple. The current limit may also influence the start-up time when the current limit is exceeded during start up. R (ISENSE) v V (ISENSE) min 1.3 I O IO — maximum output current in continuous conduction mode V(ISENSE), min = 90 mV (3) The current sense resistor’s power rating should be: P (ISENSE) w V (ISENSE) max 2 R (ISENSE) V(ISENSE), max = 120 mV (4) Setting the Output Voltage The output voltage of the TPS64200 to TPS64202 can be set using an external resistor divider. The sum of R1 and R2 should not exceed 1 M Ω to keep the influence of leakage current into the feedback pin low. V O + V FB R1 ) R2 R2 R1 + R2 V O V FB * R2 with VFB = 1.2 V (5) In some applications, depending on the layout, the capacitance may be too high from FB to GND. In this case, the internal comparator may not switch fast enough to operate with the minimum on-time or the minimum off-time given in this data sheet. For such applications a feedforward capacitor (Cff) in the range of 4.7 pF to 47 pF (typical) is added in parallel with R1 to speed up the comparator. Choose a capacitor value that is high enough that the device turns on the PMOS for its minimum on-time with no load at the output. Selecting the Input Capacitor The input capacitor is used to reduce peak currents drawn from the power source and reduces noise and voltage ripple on the input of the converter, caused by its switching action. Use low ESR tantalum capacitors or preferably X5R or X7R ceramic capacitors with a voltage rating higher than the maximum supply voltage in the application. In continuous conduction mode, the input capacitor must handle an rms-current which is given by: I Cin(rms) [ I O V O V I ,min (6) Select the input capacitor according to the calculated rms-input current requirements and according to the maximum voltage ripple. Use a minimum value of 10 µF: C I ,min + 1 2 L DI L 2 V (ripple) V I [ 1 2 L 0.3 I O 2 V (ripple) V I with: V(ripple) − voltage ripple at CI ∆IL − inductor current ripple (7) |
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