WTS701MFSLASHT datasheet(38/77 Pages) WINBOND

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WTS701

- 38 -

Table 10. Configuration Registers.

MSB

LSB

Reg. #

Default

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

COM

0x4E

0x00

ICNT

IBUF

ICNV

BUF1

BUF0

COD

0x4F

0x01

MD2

MD1

MD0

AUD

0x50

0x43

AOPU

SPPU

SPG

FDTH

AIG1

AIG0

VOL

0x51

0x07

VL2

VL1

VL0

CLC

0x14

None

CLC4

CLC3

CLC2

CLC1

CLC0

SPD

0x52

0x02

SPD2

SPD1

SPD0

X = Reserved.

The bits of each register are described below:

COM Register

ICNT

If set to a ‘1’, the device will generate an interrupt when the Count register has

been updated. This occurs after each word has been spoken.

IBUF

If set to ‘1’, the device will generate an interrupt when the buffer level crosses the

threshold set by the BUF bits. (see Table 3, Status bytes).

ICNV

If set to ‘1’, the device will generate an interrupt when the end of a conversion is

reached.

BUF1..0

If IBUF is set, BUF1..0 determines the buffer level at which the interrupt will be

generated.

00b – Input buffer empty.

01b – Input buffer <10% full.

10b – Input buffer <50% full.

11b – Input buffer <75% full.

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