FEDL610403-04

ML610401/ML610402/ML610403

2/27

• UART

− TXD/RXD × 1 channel

− Bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits

− Positive logic/negative logic selectable

− Built-in baud rate generator

• Melody driver

− Scale: 29 types (Melody sound frequency: 508 Hz to 32.768 kHz)

− Tone length: 63 types

− Tempo: 15 types

− Buzzer output mode (4 output modes, 8 frequencies, 16 duty levels)

• RC oscillation type A/D converter

− 16-bit counter

− Time division × 2 channels

• General-purpose ports

− Input-only port × 4 channels (including secondary functions)

− Output-only port

ML610401:

× 12 channels (including secondary functions)

ML610402:

× 8 channels (including secondary functions)

ML610403:

× 4 channels (including secondary functions)

− Input/output port × 18 channels (including secondary functions)

• LCD driver

− The number of segments

ML610401: 55 dots max. (11seg

×5com, 12seg×4com, 13seg×3com, and 14seg×2com selectable)

ML610402: 75 dots max. (15seg

×5com, 16seg×4com, 17seg×3com, and 18seg×2com selectable)

ML610403: 95 dots max. (19seg

×5com, 20seg×4com, 21seg×3com, and 22seg×2com selectable)

− 1/1 to 1/5 duty

− 1/3 bias (built-in bias generation circuit)

− Frame frequency selecable: approx. 64Hz, 73Hz, 85Hz, and 102Hz

− Bias voltage multiplying clock selectable (8 types)

− LCD drive stop mode, LCD display mode, all LCDs on mode, and all LCDs off mode selectable

− Programmable display allocation function

• Reset

− Reset through the RESET_N pin

− Power-on reset generation when powered on

− Reset when oscillation stop of the low-speed clock is detected (Cancellation by a mask option is possible)

− Reset by the watchdog timer (WDT) overflow

• Clock

− Low-speed clock: Crystal oscillation (32.768 kHz)

(This LSI can not guarantee the operation withoug low-speed crystal oscillation clock)

− High-speed clock: Built-in RC oscillation (500 kHz)

• Power management

− HALT mode: Instruction execution by CPU is suspended (peripheral circuits are in operating states).

− STOP mode: Stop of low-speed oscillation and high-speed oscillation (Operations of CPU and peripheral circuits are

stopped.)

− High-speed Clock gear: The frequency of high-speed system clock can be changed by software (1/1, 1/2, 1/4, 1/8 of the

oscillation clock)

− Block Control Function: Resets and completely turns circuits of unused peripherals off.