CS5451 datasheet(10/14 Pages) ETC

10 / 14 page

CS5451

DS458PP4

nal. The frequency of the charge pump driver sig-

nal is synchronous to XIN. The nominal average

frequency is 1 Mhz. The level on the VA- pin is fed

back internally so that the CPD output will regulate

the VA- level to -2/3 of VA+ level.

Note the value of C1 in Figure 5. The 40 nF value

is recommended when the input frequency present-

ed to the XIN pin is 4.00 MHz. If the user decides

to use an XIN frequency that is significantly differ-

ent than 4.00 MHz (if the XIN frequency is in-

creased/decreased by more than 5% of 4.00 MHz,

then it is recommended that the user should alter

the value of C1. The percentage change in the value

of C1 (with respect to a reference value of 40 nF)

should be inversely proportional to the percentage

change in the XIN frequency. For example, if the

XIN frequency is increased from 4.00 MHz to 4.5

MHz, this represents a percentage increase of

12.5%. Therefore, the value of C1 should be re-

duced by 12.5%, making the new value for C1 to be

35 nF. For more information about the operation of

this type of charge pump circuit, the reader can re-

fer to Cirrus Logic, Inc.’s application note AN152:

Using the CS5521/24/28, and CS5525/26 Charge

Pump Drive for External Loads.

2.9

PCB Layout

For optimal performance, the CS5460A should be

placed entirely over an analog ground plane with

both the VA- and DGND pins of the device con-

nected to the analog plane. Place the analog-digital

plane split immediately adjacent to the digital por-

tion of the chip.

Note:

Refer to the CDB5460A Evaluation Board for

suggested layout details and Applications Note

18 for more detailed layout guidelines. Before

layout, please call for our Free Schematic

Review Service.

AGND

BAT 85

40 nF

CPD

VA-

BAT 85

1µF

Figure 5. Generating VA- with a Charge Pump

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