Digital pulse compression module

CI E03

March 15

CI E03 Revision A3

5 / 11

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Line

Parameter

Test Condition

Min.

Typ.

Max.

Unit

RF_OUT_A / RF_OUT_B

2.11

Coupling

AC

2.12

Impedance

50

Ω

2.13

Sampling rate

250

MSPS

2.14

Resolution

16

bits

2.15

Bandwidth

100

MHz

2.16

Output level

5

dBm

CLK_IN

2.17

Coupling

AC

2.18

Impedance

50

Ω

2.19

Frequency

10

20

2

125

MHz

Status signals (BOARD_OK, INITTIME_ALM, POWER_OK, TEMP_OK)

2.20

Logic high output voltage

IOH = 8 mA

2.9

3.3

V

2.21

Logic low output voltage

IOL = 8 mA

0

0.4

V

Control signals (CLKEXT_EN, N_RST)

2.22

Logic high input voltage

2.0

3.3

V

2.23

Logic low input voltage

0

0.8

V

Power down signal (N_BOARD_PD)

2.24

Logic low input voltage

0

1

V

User signals (USERCLVTx)

2.25

Logic high input voltage

2.0

3.3

V

2.26

Logic low input voltage

0

0.8

V

2.27

Logic high output voltage

IOH = 8 mA

2.9

3.3

V

2.28

Logic low output voltage

IOL = 8 mA

0

0.4

V

User signals (USERFLVTx)

2.29

Logic high input voltage

2.0

3.3

V

2.30

Logic low input voltage

0

0.8

V

2.31

Logic high output voltage

IOH = 2 to 24 mA

(programmable)

2.4

3.3

V

2.32

Logic low output voltage

IOL = 2 to 24 mA

(programmable)

0

0.4

V

User signals (USERFDIFFx, programmed as single 2.5V LVCMOS signals)

2.33

Logic high input voltage

1.7

2.5

V

2.34

Logic low input voltage

0

0.7

V

2.35

Logic high output voltage

IOH = 2 to 24 mA

(programmable)

2.1

2.5

V