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DIX4192 Datasheet(PDF) 36 Page - Texas Instruments

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Part # DIX4192
Description  Integrated Digital Audio Interface Receiver and Transmitter
PDF  69 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DIX4192 Datasheet(HTML) 36 Page - Texas Instruments

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DIX4192-Q1
SBFS041A – JULY 2016 – REVISED APRIL 2017
www.ti.com
Product Folder Links: DIX4192-Q1
Submit Documentation Feedback
Copyright © 2016–2017, Texas Instruments Incorporated
Figure 39. Register 11: Receiver PLL1 Configuration Register 3
7 (MSB)
6
5
4
3
2
1
0 (LSB)
D7
D6
D5
D4
D3
D2
D1
D0
Table 18. Register 11: Receiver PLL1 Configuration Register 3 Field Descriptions
Registers 0x0F through 0x11 are used to program PLL1 in the DIR core. PLL1 multiplies the DIR reference clock source to an oversampling rate which is
adequate for AES3 decoder operation. PLL1 is programmed using the following relationship:
(CLOCK × K) / P = 98.304 MHz
where:
CLOCK = frequency of the DIR reference clock source.
K = J.D, where the integer part J = 1 to 63, and the fractional part D = 0 to 9999.
P = the pre-divider value, which may be set to any 4-bit value that meets the conditions stated below.
The following conditions must be met for the values of P, J, and D:
If D = 0,
then:
2 MHz
≤ (CLOCK / P) ≤ 20 MHz and 4 ≤ J ≤ 55.
If D
≠ 0,
then:
10 MHz
≤ (CLOCK / P) ≤ 20 MHz and 4 ≤ J ≤11.
Referring to registers 0x0F through 0x11:
P is programmed using bits P[3:0].
J is programmed using bits J[5:0].
D is programmed using bits D[13:0].
Table 19 shows values for P, J, and D for common
DIR reference clock rates.
Table 19. PLL1 Register Values for Common Reference Clock Rates
REFERENCE CLOCK RATE (MHz)
P
J
D
ERROR (%)
8.1920
1
12
0
0.0000
11.2896
1
8
7075
0.0002
12.2880
1
8
0
0.0000
16.3840
1
6
0
0.0000
22.5792
2
8
7075
0.0002
24.5760
2
8
0
0.0000
27.0000
2
7
2818
0.0003
Figure 40. Register 12: Non-PCM Audio Detection Status Register (Read-Only)
7 (MSB)
6
5
4
3
2
1
0 (LSB)
0
0
0
0
0
0
DTS CD/LD
IEC61937
Table 20. Register 12: Non-PCM Audio Detection Status Register (Read-Only) Field Descriptions
IEC61937
This bit is used to indicate the detection of an IEC 61937 data reduced audio format (includes Dolby AC-3, DTS, etc.) for DVD playback
or general transmission purposes.
IEC61937
Status
0
Data is not an IEC61937 format.
1
Data is an IEC61937 format. Refer to the PC and PD preamble registers (addresses 0x29
through 0x2C) for data type and burst length.
DTS CD/LD
This bit is used to indicate the detection of a DTS encoded audio compact disc (CD) or Laserdisc (LD) playback.
DTS CD/LD
Status
0
The CD/LD is not DTS-encoded.
1
DTS CD/LD playback detected.



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