PC97338 datasheet(194/221 Pages) NSC

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7.0 Power Management

The chip places special emphasis on power manage-

ment. Power management is implemented in the two

major states of the chip: Power-Down and Power-Up.

7.1

POWER-DOWN STATE

Power-down can be divided into two major groups:

Group 1:

Full power-down - the entire chip is powered-

down/disabled.

Group 2:

Specific function power-down - specific SuperI/O

modules (FDC, SCC1, SCC2, ECP, Parallel Port)

are powered-down/disabled.

All power-down modes are enhanced by a new fea-

ture which allows TRI-STATE of the output pins asso-

ciated with a specific function (FDC, SCC1, SCC2,

Parallel Port), and reduces current leakage by block-

ing their inputs.

Four modules in the chip are operated by the internal

clock - FDC, SCC1, SCC2 and ECP. These modules

can be powered-down/disabled by stopping their as-

sociated internal clocks. In addition, all four modules

can be powered-down/disabled by stopping the exter-

nal crystal oscillator.

Modules which do not use a clock; e.g., Parallel Port

(SPP/EPP), can be powered-down/disabled by sim-

ply blocking access to them.

All the above power-down modes can be achieved

using the power-down methods from Group 1 or

Group 2, as described below.

7.1.1

Recommended Power-Down

Methods - Group 1

Use the power-down methods in Group 1 to place the

chip in following modes:

Mode 1

The entire chip is powered-down, the oscillator is

stopped, pins are TRI-STATE, and the inputs are

blocked.

In this mode the maximum current saving can be

achieved.

Mode 2

The entire chip is powered-down and the oscillator

is stopped. Pins are driven.

There are five ways to reach the above two operating

modes. See Table 106.

TABLE 106. Group 1 Power-Down

Notes:

1. The chip can also be placed in Mode 2 by using method #5, and entering FDC Low Power by executing Mode

Command or by setting bit 6 of DSR to high.

2. The Current Consumption values are measured under the following conditions:

— No load on output signals

— Input signals are stable

Method

PTR bit

FER bits

3210

PCR bit

PMC bits

621

SCF0 bit

Mode

Typical Current

Consumption (5v

VCC)

xxxx

111

600

µA

0000

111

xxxx

000

1.5 mA

0000

000

1xxx

000

PC97338 Datasheet(PDF) 194 Page - National Semiconductor (TI)

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