L99MD01 datasheet(22/54 Pages) STMICROELECTRONICS

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Functional description of the SPI

L99MD01

22/54

Doc ID 17242 Rev 6

Functional description of the SPI

5.1

Signal description

5.1.1

Serial clock (SCK)

This input signal provides the timing of the serial interface. Data present at Serial Data Input

(SDI) is latched on the rising edge of Serial Clock (SCK). Data on Serial Data Out (SDO) is

shifted out at the falling edge of Serial Clock (see

Figure 7).

The SPI can be driven by a microcontroller with its SPI peripherals running in following

mode: CPOL=0 and CPHA=0 (see

Figure 7).

5.1.2

Serial data input (SDI)

This input is used to transfer data serially into the device. It receives the data to be written.

Values are latched on the rising edge of Serial Clock (SCK).

Serial data output (SDO)

This output signal is used to transfer data serially out of the device. Data is shifted out on the

falling edge of Serial Clock (SCK). SDO also reflects the status of the <Global Error Flag>

(Bit 7 of the <Global Status Register>) while CSN is low and no clock signal is present.

Chip select not (CSN)

When this input signal is High, the device is deselected and Serial Data Output (SDO) is

high impedance (3-state). Driving this input low enables the communication. The

communication must start and stop on a low level of Serial Clock (SCK).

Figure 7.

Clock polarity and clock phase

L99MD01 Datasheet(PDF) 22 Page - STMicroelectronics