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STM32F072C8 Datasheet(PDF) 97 Page - STMicroelectronics |
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STM32F072C8 Datasheet(HTML) 97 Page - STMicroelectronics |
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97 / 128 page  DocID025004 Rev 5 97/128 STM32F072x8 STM32F072xB Electrical characteristics 99 Figure 33. I2S slave timing diagram (Philips protocol) 1. Measurement points are done at CMOS levels: 0.3 × VDDIOx and 0.7 × VDDIOx. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. tsu(SD_MR) Data input setup time Master receiver 6 - ns tsu(SD_SR) Slave receiver 2 - th(SD_MR)(2) Data input hold time Master receiver 4 - th(SD_SR)(2) Slave receiver 0.5 - tv(SD_MT)(2) Data output valid time Master transmitter - 4 tv(SD_ST)(2) Slave transmitter - 20 th(SD_MT) Data output hold time Master transmitter 0 - th(SD_ST) Slave transmitter 13 - 1. Data based on design simulation and/or characterization results, not tested in production. 2. Depends on fPCLK. For example, if fPCLK = 8 MHz, then TPCLK = 1/fPLCLK = 125 ns. Table 69. I2S characteristics(1) (continued) Symbol Parameter Conditions Min Max Unit |
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