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DRA710 Datasheet(PDF) 34 Page - Texas Instruments |
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DRA710 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 440 page ![]() Copyright © 2016–2017, Texas Instruments Incorporated Terminal Configuration and Functions Submit Documentation Feedback Product Folder Links: DRA710 DRA712 DRA714 DRA716 DRA718 34 DRA710, DRA712 DRA714, DRA716, DRA718 SPRS960B – JUNE 2016 – REVISED FEBRUARY 2017 www.ti.com Table 4-1. Pin Attributes(1) (continued) BALL NUMBER [1] BALL NAME [2] SIGNAL NAME [3] Support [4] MUXMODE [5] TYPE [6] BALL RESET STATE [7] BALL RESET REL. STATE [8] BALL RESET REL. MUXMODE [9] I/O VOLTAGE VALUE [10] POWER [11] HYS [12] BUFFER TYPE [13] PULL UP/DOWN TYPE [14] DSIS [15] C17 mcasp1_fsx mcasp1_fsx 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 vin1a_de0 7 I 0 i2c3_scl 10 IO 1 pr2_mdio_data No 11 IO 1 gpio7_30 14 IO Driver off 15 I E19 mcasp2_aclkx mcasp2_aclkx 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 vin1a_d7 7 I 0 pr2_mii0_rxd2 No 11 I 0 pr2_pru0_gpi18 No 12 I pr2_pru0_gpo18 No 13 O Driver off 15 I A20 mcasp2_axr0 mcasp2_axr0 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 Driver off 15 I B19 mcasp2_axr1 mcasp2_axr1 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 Driver off 15 I A21 mcasp2_axr2 mcasp2_axr2 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 mcasp3_axr2 1 IO 0 vin1a_d5 7 I 0 pr2_mii0_rxd0 No 11 I 0 pr2_pru0_gpi16 No 12 I pr2_pru0_gpo16 No 13 O gpio6_8 14 IO Driver off 15 I B21 mcasp2_axr3 mcasp2_axr3 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 mcasp3_axr3 1 IO 0 vin1a_d4 7 I 0 pr2_mii0_rxlink No 11 I 0 pr2_pru0_gpi17 No 12 I pr2_pru0_gpo17 No 13 O gpio6_9 14 IO Driver off 15 I B20 mcasp2_axr4 mcasp2_axr4 0 IO PD PD 15 1.8/3.3 vddshv3 Yes Dual Voltage LVCMOS PU/PD 0 mcasp8_axr0 1 IO 0 gpio1_4 14 IO Driver off 15 I |
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