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TPL7407LAPWR Datasheet(PDF) 7 Page - Texas Instruments |
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TPL7407LAPWR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 22 page ![]() COM OUT(1-7) IN(1-7) 1M 50 k OVP Regulation Circuitry DRIVER 7 TPL7407LA www.ti.com SLRS073 – MAY 2017 Product Folder Links: TPL7407LA Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview This device has proven ubiquity and versatility across a wide range of applications. This is due to its integration of 7 low side NMOS transistors that are capable of sinking up to 600 mA and wide GPIO range capability. The TPL7407LA comprises seven high voltage, high current NMOS transistors tied to a common ground driven by internal level shifting and gate drive circuitry. The TPL7407LA offers solutions to many interface needs, including solenoids, relays, lamps, small motors, and LEDs. Applications requiring sink currents beyond the capability of a single output may be accommodated by paralleling the outputs. The TPL7407LA also enables pin to pin replacement with legacy 7 channel darlington pair implementations. This device can operate over a wide temperature range (–40°C to +125°C). 7.2 Functional Block Diagram 7.3 Feature Description Each channel of the TPL7407LA consists of high power low side NMOS transistors driven by level shifting and gate driving circuitry. The gate drivers allow for high output current drive with a very low input voltage, meaning full operation with low GPIO voltages. In order to enable floating inputs a 1-MΩ pull-down resistor exists on each channel. Another 50-kΩ resistor exists between the input and gate driving circuitry. This exists to limit the input current whenever there is an over voltage and the internal Zener clamps. It also interacts with the inherent capacitance of the gate driving circuitry to behave as an RC snubber to help prevent spurious switching in noisy environment. In order to power the gate driving circuitry an LDO exists. See the Power Supply Recommendations section for further detail on this circuitry. The diodes connected between the output and COM pin is used to suppress kick-back voltage from an inductive load that is excited when the NMOS drivers are turned off (stop sinking) and the stored energy in the coils causes a reverse current to flow into the coil supply. 7.4 Device Functional Modes 7.4.1 Inductive Load Drive When the COM pin is tied to the coil supply voltage, the TPL7407LA is able to drive inductive loads and suppress the kick-back voltage via the internal free wheeling diodes. 7.4.2 Resistive Load Drive When driving a resistive load, a pull-up resistor is needed in order for the TPL7407LA to sink current and for there to be a logic high level. The COM pin must be supplied ≥ 6.5 V for full functionality. |
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