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TLE4471 Datasheet(PDF) 3 Page - Infineon Technologies AG |
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TLE4471 Datasheet(HTML) 3 Page - Infineon Technologies AG |
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3 / 26 page ![]() Data Sheet Rev. 1.1 3 2001-09-06 TLE 4471 Figure 2 Pin Configuration (top view) Pin Definitions and Functions Pin No. Symbol Function 1, 10, 11, 20 GND GROUND 2E1 Enable 1: Enable for Main Output Q1 and Q2; E1, E2 and E3 are ored together; connect to GND, if not needed. 3I Input; block to ground directly at the IC for line compensation. 4Q2 Tracking Output Q2; block to GND with min. 10 µF with ESR < 3 Ω. 5REF2 Reference Output; Reference Voltage related to Q2. 6R Reset Output; the open collector Output is connected to Q1 via an integrated resistor. 7DR Reset Delay; connect a capacitor to GND for reset delay time adjustment. 8E2 Enable 2: Enable for Main Output Q1 and Q2; E1, E2 and E3 are ored together; connect to GND, if not needed. 9Q1 Main Output Q1; block to GND with min. 22 µF, ESR < 3 Ω. 12 RADJ Reset Switching Threshold Adjust; The reset threshold can be set individually with an external voltage divider at the pin. If it is connected straight to GND the reset threshold remains at 4.65 V. 13 NC Not Connected AEP02865 20 E1 2 3 4 5 I Q2 REF2 R6 7 8 DR E2 Q1 9 10 GND 19 18 17 16 15 14 13 12 11 GND GND DW W Q3 E3 EN GND 1 RADJ N.C. REF3 |
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