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LT1818/LT1819

18189f

APPLICATIO S I FOR ATIO

Slew Rate

The slew rate of the LT1818/LT1819 is proportional to the

differential input voltage. Highest slew rates are therefore

seen in the lowest gain configurations. For example, a 6V

output step with a gain of 10 has a 0.6V input step, whereas

at unity gain there is a 6V input step. The LT1818/LT1819

is tested for slew rate at a gain of –1. Lower slew rates

occur in higher gain configurations, whereas the highest

slew rate (2500V/

µs) occurs in a noninverting unity-gain

configuration.

Power Dissipation

The LT1818/LT1819 combine high speed and large output

drive in small packages. It is possible to exceed the

maximum junction temperature specification (150

°C)

under certain conditions. Maximum junction temperature

(TJ) is calculated from the ambient temperature (TA),

power dissipation per amplifier (PD) and number of ampli-

fiers (n) as follows:

TJ = TA + (n • PD • θJA)

Power dissipation is composed of two parts. The first is

due to the quiescent supply current and the second is due

to on-chip dissipation caused by the load current. The

worst-case load-induced power occurs when the output

voltage is at 1/2 of either supply voltage (or the maximum

swing if less than 1/2 the supply voltage). Therefore PDMAX

is:

PDMAX =(V+ – V–) • (ISMAX) + (V+/2)2/RL or

PDMAX =(V+ – V–) • (ISMAX) +

(V+ – VOMAX) • (VOMAX/RL)

Example: LT1819IS8 at 85

°C, VS = ±5V, RL = 100Ω

PDMAX = (10V) • (14mA) + (2.5V)2/100Ω = 202.5mW

TJMAX = 85°C + (2 • 202.5mW) • (150°C/W) = 146°C

Circuit Operation

The LT1818/LT1819 circuit topology is a true voltage

feedback amplifier that has the slewing behavior of a

current feedback amplifier. The operation of the circuit can

be understood by referring to the Simplified Schematic.

Complementary NPN and PNP emitter followers buffer the

inputs and drive an internal resistor. The input voltage

appears across the resistor, generating a current that is

mirrored into the high impedance node.

Complementary followers form an output stage that buffer

the gain node from the load. The input resistor, input stage

transconductance and the capacitor on the high imped-

ance node determine the bandwidth. The slew rate is

determined by the current available to charge the gain

node capacitance. This current is the differential input

voltage divided by R1, so the slew rate is proportional to

the input step. Highest slew rates are therefore seen in the

lowest gain configurations.

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