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COP880C Datasheet(PDF) 18 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # COP880C
Description  Microcontrollers
PDF  31 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

COP880C Datasheet(HTML) 18 Page - National Semiconductor (TI)

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Memory Map (Continued)
Address
Contents
FE
B Register
Reading unused memory locations below 7FH will return all
ones. Reading other unused memory locations will return
undefined data.
Instruction Set
REGISTER AND SYMBOL DEFINITIONS
Registers
A
8-bit Accumulator register
B
8-bit Address register
X
8-bit Address register
SP
8-bit Stack pointer register
PC
15-bit Program counter register
PU
upper 7 bits of PC
PL
lower 8 bits of PC
C
1-bit of PSW register for carry
HC
Half Carry
GIE 1-bit of PSW register for global interrupt enable
Symbols
[B]
Memory indirectly addressed by B register
[X]
Memory indirectly addressed by X register
Mem
Direct address memory or [B]
MemI Direct address memory or [B] or Immediate data
Imm
8-bit Immediate data
Reg
Register memory: addresses F0 to FF (Includes B, X
and SP)
Bit
Bit number (0 to 7)
←
Loaded with
↔
Exchanged with
Instruction Set
ADD
add
A ← A + MemI
ADC
add with carry
A ← A+MemI+C,C ← Carry
HC ← Half Carry
SUBC
subtract with carry
A ← A + MemI +C, C ← Carry
HC ← Half Carry
AND
Logical AND
A ← A and MemI
OR
Logical OR
A ← A or MemI
XOR
Logical Exclusive-OR
A ← A xor MemI
IFEQ
IF equal
Compare A and MemI, Do next if A = MemI
IFGT
IF greater than
Compare A and MemI, Do next if A > MemI
IFBNE
IF B not equal
Do next if lower 4 bits of B
≠ Imm
DRSZ
Decrement Reg. ,skip if zero
Reg ← Reg − 1, skip if Reg goes to 0
SBIT
Set bit
1 to bit,
Mem (bit= 0 to 7 immediate)
RBIT
Reset bit
0 to bit,
Mem
IFBIT
If bit
If bit,
Mem is true, do next instr.
X
Exchange A with memory
A
↔ Mem
LD A
Load A with memory
A ← MemI
LD mem
Load Direct memory Immed.
Mem ← Imm
LD Reg
Load Register memory Immed.
Reg ← Imm
X
Exchange A with memory [B]
A
↔ [B]
(B ← B±1)
X
Exchange A with memory [X]
A
↔ [X]
(X ← X±1)
LD A
Load A with memory [B]
A ← [B]
(B ← B±1)
LD A
Load A with memory [X]
A ← [X]
(X ← X±1)
LD M
Load Memory Immediate
[B] ← Imm (B ← B±1)
CLRA
Clear A
A ← 0
INCA
Increment A
A ← A+1
DECA
Decrement A
A ← A−1
LAID
Load A indirect from ROM
A ← ROM(PU,A)
DCORA
DECIMAL CORRECT A
A ← BCD correction (follows ADC, SUBC)
RRCA
ROTATE A RIGHT THRU C
C → A7 → … → A0 → C
www.national.com
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