Application Information

A typical application of this chip is shown in Figure 3. In this application, a reverse bias voltage of approx. 1.5 V is used. Since the appli -

cations are typically light barriers as shown in Figure 1, dark current is not important at all, even in the range of up to 100nA.

Figure 3: Typical schematic circuit using an epc13x photo pulse amplifier

Recommended Components Values (examples only – depends on particular application case)

R1: 27k (bias resistor). Sensitivity can be reduced by the reduction of this resistor.

C1: Usually not needed. May be up to 100 pF (refer to the epc13x data sheet).

C2: 33nF (DC input current filter capacitor)

C3: 100nF or more (power supply filter capacitor)

Spectral Sensitivity

This photo diode contains an anti-reflection coating on the photosensitive surface. Standard versions have no optical filter in order to al -

low applications from the near UV to the near IR range. However, optical filters deposited on the photosensitive surface are available

upon request. The filter parameters can be adjusted in a wide range according to specific customer requirements.

Design rules

The cathode pins are connected on chip. A proper design ensures that all cathode pins are connected to the same voltage level.

All pins of the diode array should be connected.

<Partname>

<x000 000>

<Name>

<Data>

M 1:1

DIN A4

<Name>

Part Name

Part No.

Designed

Approved

Scale

Page

File:

1

26.02.2009

)

CSP5 Package

4

3

1.00

1.75 +0.00/-0.10

Solder balls

Sn97.5Ag2.5

photosensitive area

max 0.10

1

2

Top View

Bottom View

5

photo diode

area

0.5x45°

0.50

∅ 0.30

1.75

no solder mask inside this area

max. 0.1524

Figure 4: Mechanical dimensions

Figure 5: Layout recommendation

© 2014 ESPROS Photonics Corporation

Characteristics subject to change without notice

4 / 6

Datasheet epc200 - V1.2

www.espros.ch

C1

epc13x

PD

CN

OUT

VN

VSS

VDD

epc200

C2

C3

5V

R

1