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HD404848FS Datasheet(PDF) 17 Page - Hitachi Semiconductor |
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HD404848FS Datasheet(HTML) 17 Page - Hitachi Semiconductor |
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17 / 125 page ![]() HD404849 Series 17 Item Abbr. Initial Value Contents Timer/ Serial mode register A (SMRA) 0000 Refer to description of serial mode register A counters, Serial mode register B (SMRB) - - X0 Refer to description of serial mode register B serial Prescaler S (PSS) $000 — interface Prescaler W (PSW) $00 — Timer counter A (TCA) $00 — Timer counter B (TCB) $00 — Timer counter C (TCC) $00 — Timer counter D (TCD) $00 — Timer write register B (TWBU, TWBL) $X0 — Timer write register C (TWCU, TWCL) $X0 — Timer write register D (TWDU, TWDL) $X0 — Octal counter 000 — A/D A/D mode register (AMR) 0000 Refer to description of A/D mode register A/D data register (ADRU, ADRL) $80 Refer to description of A/D mode register LCD LCD control register (LCR) 0000 Refer to description of LCD control register LCD mode register (LMR) 0000 Refer to description of LCD duty-cycle/clock control register LCD output register 3 (LOR3) - 00 - Sets R-port/LCD segment pins to R port mode Bit registers Low speed on flag (LSON) 0 Refer to description of operating modes Watchdog timer on flag (WDON) 0 Refer to description of timer C A/D start flag (ADSF) 0 Refer to description of A/D converter A/D current off flag (IAOF) 0 Direct transfer on flag (DTON) 0 Refer to description of operating modes Input capture status flag (ICSF) 0 Refer to description of timer D Input capture error flag (ICEF) 0 Refer to description of timer D Others Miscellaneous register (MIS) 0000 Refer to description of operating modes, I/O, and serial interface System clock select register bits 2, 1 (SSR2, SSR1) 00 - Refer to description of operating modes and oscillation circuits Bank register (V) - - - 0 Refer to description of RAM memory map Notes: 1. The statuses of other registers and flags after MCU reset are shown in the following table. 2. X indicates invalid value. – indicates that the bit does not exist. |
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