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LM4912 Datasheet(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM4912
Description  Stereo 40mW Low Noise Headphone Amplifier
PDF  14 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM4912 Datasheet(HTML) 12 Page - National Semiconductor (TI)

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Application Information
AMPLIFIER CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4912 has three operational
amplifiers internally. Two of the amplifier’s have externally
configurable gain while the other amplifier is internally fixed
at the bias point acting as a unity-gain buffer. The closed-
loop gain of the two configurable amplifiers is set by select-
ing the ratio of R
f to Ri. Consequently, the gain for each
channel of the IC is
A
VD = -(Rf /Ri)
By driving the loads through outputs V
oA and VoB with VoC
acting as a buffered bias voltage the LM4912 does not
require output coupling capacitors. The classical single-
ended amplifier configuration where one side of the load is
connected to ground requires large, expensive output cou-
pling capacitors.
A configuration, such as the one used in the LM4912, has a
major advantage over single supply, single-ended amplifiers.
Since the outputs V
oA, VoB, and VoC are all biased at 1/2
V
DD, no net DC voltage exists across each load. This elimi-
nates the need for output coupling capacitors which are
required in a single-supply, single-ended amplifier configura-
tion. Without output coupling capacitors in a typical single-
supply, single-ended amplifier, the bias voltage is placed
across the load resulting in both increased internal IC power
dissipation and possible loudspeaker damage.
POWER DISSIPATION
Power dissipation is a major concern when using any power
amplifier and must be thoroughly understood to ensure a
successful design. When operating in capacitor-coupled
mode, Equation 1 states the maximum power dissipation
point for a single-ended amplifier operating at a given supply
voltage and driving a specified output load.
P
DMAX =(VDD)
2 /(2
π2R
L)
(1)
Since the LM4912 has two operational amplifiers in one
package, the maximum internal power dissipation point is
twice that of the number which results from Equation 1. From
Equation 1, assuming a 3V power supply and a 32
Ω load,
the maximum power dissipation point is 14mW per amplifier.
Thus the maximum package dissipation point is 28mW.
The maximum power dissipation point obtained from Equa-
tion 1 must not be greater than the power dissipation that
results from Equation 2:
P
DMAX =(TJMAX -TA)/
θ
JA
(2)
For package MUB10A,
θ
JA = 190˚C/W. TJMAX = 150˚C for
the LM4912. Depending on the ambient temperature, T
A,of
the system surroundings, Equation 2 can be used to find the
maximum internal power dissipation supported by the IC
packaging. If the result of Equation 1 is greater than that of
Equation 2, then either the supply voltage must be de-
creased, the load impedance increased or T
A reduced. For
the typical application of a 3V power supply, with an 32
Ω
load, the maximum ambient temperature possible without
violating the maximum junction temperature is approximately
144˚C provided that device operation is around the maxi-
mum power dissipation point. Thus, for typical applications,
power dissipation is not an issue. Power dissipation is a
function of output power and thus, if typical operation is not
around the maximum power dissipation point, the ambient
temperature may be increased accordingly. Refer to the
Typical Performance Characteristics curves for power dissi-
pation information for lower output powers.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is important
for low noise performance and high power supply rejection.
The capacitor location on the power supply pins should be
as close to the device as possible.
Typical applications employ a 3V regulator with 10mF tanta-
lum or electrolytic capacitor and a ceramic bypass capacitor
which aid in supply stability. This does not eliminate the need
for bypassing the supply nodes of the LM4912. A bypass
capacitor value in the range of 0.1µF to 1µF is recommended
for C
S.
MICRO POWER SHUTDOWN
The voltage applied to the SHUTDOWN pin controls the
LM4912’s shutdown function. Activate micro-power shut-
down by applying a logic-low voltage to the SHUTDOWN
pin. When active, the LM4912’s micro-power shutdown fea-
ture turns off the amplifier’s bias circuitry, reducing the sup-
ply current. The trigger point varies depending on supply
voltage and is shown in the Shutdown Hysteresis Voltage
graphs in the Typical Performance Characteristics section.
The low 0.1µA(typ) shutdown current is achieved by apply-
ing a voltage that is as near as ground as possible to the
SHUTDOWN pin. A voltage that is higher than ground may
increase the shutdown current. There are a few ways to
control the micro-power shutdown. These include using a
single-pole, single-throw switch, a microprocessor, or a mi-
crocontroller. When using a switch, connect an external
100k
Ω pull-up resistor between the SHUTDOWN pin and
V
DD. Connect the switch between the SHUTDOWN pin and
ground. Select normal amplifier operation by opening the
switch. Closing the switch connects the SHUTDOWN pin to
ground, activating micro-power shutdown.
The switch and resistor guarantee that the SHUTDOWN pin
will not float. This prevents unwanted state changes. In a
system with a microprocessor or microcontroller, use a digi-
tal output to apply the control voltage to the SHUTDOWN
pin. Driving the SHUTDOWN pin with active circuitry elimi-
nates the pull-up resistor.
Shutdown enable/disable times are controlled by a combina-
tion of C
B and VDD. Larger values of CB results in longer turn
on/off times from Shutdown. Smaller Vdd values also in-
crease turn on/off time for a given value of C
B. Longer
shutdown times also improve the LM4912’s resistance to
click and pop upon entering or returning from shutdown. For
a 2.4V supply and C
B = 4.7µF, the LM4912 requires about 2
seconds to enter or return from shutdown. This longer shut-
down time enables the LM4912 to have virtually zero pop
and click transients upon entering or release from shutdown.
Smaller values of C
B will decrease turn-on time, but at the
cost of increased pop and click and reduced PSRR. Since
shutdown enable/disable times increase dramatically as
supply voltage gets below 2.2V, this reduced turn-on time
may be desirable if extreme low supply voltage levels are
used as this would offset increases in turn-on time caused by
the lower supply voltage.
www.national.com
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