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LT1976

1976f

APPLICATIO S I FOR ATIO

Example: with VIN = 40V, VOUT = 5V and IOUT = 1A:

BOOST

= ()( ) ( ) +

()

()()( )(

)

= () () =

()+ () =

03 1

9 1 2 1 40 200 3

004 0 388

043

51 36

002

40 0 0015

5 0 003

0 08

–/

Total power dissipation is:

PTOT = 0.43 + 0.02 + 0.08 = 0.53W

Thermal resistance for the LT1976 package is influenced

by the presence of internal or backside planes. With a full

plane under the FE16 package, thermal resistance will be

about 45

°C/W. No plane will increase resistance to about

150

°C/W. To calculate die temperature, use the proper

thermal resistance number for the desired package and

add in worst-case ambient temperature:

TJ = TA + QJA (PTOT)

With the FE16 package (QJA = 45°C/W) at an ambient

temperature of 70

°C:

TJ = 70 + 45(0.53) = 94°C

Input Voltage vs Operating Frequency Considerations

The absolute maximum input supply voltage for the LT1976

is specified at 60V. This is based solely on internal semi-

conductor junction breakdown effects. Due to internal

power dissipation the actual maximum VIN achievable in a

particular application may be less than this.

A detailed theoretical basis for estimating internal power

loss is given in the section Thermal Considerations. Note

that AC switching loss is proportional to both operating

frequency and output current. The majority of AC switch-

ing loss is also proportional to the square of input voltage.

For example, while the combination of VIN = 40V, VOUT =

5V at 1A and fOSC = 200kHz may be easily achievable,

simultaneously raising VIN to 60V and fOSC to 700kHz is

not possible. Nevertheless, input voltage transients up to

60V can usually be accommodated, assuming the result-

ing increase in internal dissipation is of insufficient time

duration to raise die temperature significantly.

A second consideration is controllability. A potential limi-

tation occurs with a high step-down ratio of VIN to VOUT,

as this requires a correspondingly narrow minimum switch

on time. An approximate expression for this (assuming

continuous mode operation) is given as follows:

tON(MIN) = VOUT + VF/VIN(fOSC)

where:

VIN = input voltage

VOUT = output voltage

VF = Schottky diode forward drop

fOSC = switching frequency

A potential controllability problem arises if the LT1976 is

called upon to produce an on time shorter than it is able to

produce. Feedback loop action will lower then reduce the

VC control voltage to the point where some sort of cycle-

skipping or Burst Mode behavior is exhibited.

In summary:

1. Be aware that the simultaneous requirements of high

VIN, high IOUT and high fOSC may not be achievable in

practice due to internal dissipation. The Thermal Con-

siderations section offers a basis to estimate internal

power. In questionable cases a prototype supply should

be built and exercised to verify acceptable operation.

2. The simultaneous requirements of high VIN, low VOUT

and high fOSC can result in an unacceptably short

minimum switch on time. Cycle skipping and/or Burst

Mode behavior will result although correct output volt-

age is usually maintained.

FREQUENCY COMPENSATION

Before starting on the theoretical analysis of frequency

response the following should be remembered—the worse

the board layout, the more difficult the circuit will be to

stabilize. This is true of almost all high frequency analog

circuits. Read the Layout Considerations section first.

Common layout errors that appear as stability problems

are distant placement of input decoupling capacitor and/or

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