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HT9B95 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT9B95 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 32 page ![]() Rev. 1.10 10 November 25, 2015 HT9B95A/B/G Functional Description Power-On Reset Whenthepowerisapplied,thedeviceisinitialized byaninternalpower-onresetcircuit.Thestatusofthe internalcircuitsafterinitializationisasfollows: • AllcommonoutputsaresettoVSS. • AllsegmentoutputsaresettoVSS. • LCDDriverOutputWaveform:B-typeinversion. • Internaloscillatorisselected. • The1/3biasdrivemodeisselected. • LCDbiasgeneratorisinanoffstate. • LCDDisplayandinternaloscillatorareinoff states. • Powersavemodeissettonormalcurrent. • FrameFrequencyissetto80Hz. • Blinkingfunctionisswitchedoff DatatransfersontheI2C-busshouldbeavoidedfor 1msfollowingpower-ontoallowcompletionofthe resetaction. System Oscillator ThetimingfortheinternallogicandtheLCDdrive signalsaregeneratedbytheinternaloscillator.The SystemClockfrequency(fSYS)determinestheLCD framefrequency.Duringinitialsystempoweronthe SystemOscillatorwillbeinthestopstate. Segment Driver Outputs TheLCDdrivesectionincludesupto43segment outputsSEG0~SEG42whichshouldbeconnected directlytotheLCDpanel.Thesegmentoutputsignals aregeneratedinaccordancewiththemultiplexed commonsignalsandwiththedataresidentinthedisplay latch.Theunusedsegmentoutputsshouldbeleft open-circuit. Column Driver Outputs TheLCDdrivesectionincludesupto8column outputsCOM0~COM7whichshouldbeconnected directlytotheLCDpanel.Thecolumnoutputsignals aregeneratedinaccordancewiththeselectedLCD drivemode.Theunusedcolumnoutputsshouldbe leftopen-circuitiflessthan8columnoutputsare required. Address Pointer TheaddressingmechanismforthedisplayRAMis implementedusingtheaddresspointer.Thisallows theloadingofanindividualdisplaydatabyte,ora seriesofdisplaydatabytes,intoanylocationofthe displayRAM.Thesequencecommenceswiththeini- tializationoftheaddresspointerbytheDisplayData Inputcommand. Display Memory – RAM Structure ThedisplayRAMisstatic39x8bitsRAMwhich storestheLCDdata.Logic“1”intheRAMbit-map indicatesthe“on”stateofthecorrespondingLCD segment;similarly,logic0indicatesthe‘off’state. ThecontentsoftheRAMdataaredirectlymapped totheLCDdata.ThefirstRAMcolumncorresponds tothesegmentsoperatedwithrespecttoCOM0. InmultiplexedLCDapplicationsthesegmentdata from2ndto7thcolumnofthedisplayRAMaretime- multiplexedwithCOM1toCOM7respectively.The followingdiagramisadatatransferformatforI2C interface. MSB LSB SDA Data Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 LCD Display Output Data Transfer Format for I2C Bus |
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