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HT67F488 Datasheet(PDF) 117 Page - Holtek Semiconductor Inc |
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HT67F488 Datasheet(HTML) 117 Page - Holtek Semiconductor Inc |
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117 / 171 page  Rev. 1.60 117 �ove��e� ��� �016 HT67F488/HT67F489 TinyPowerTM A/D Flash MCU with LCD & EEPROM Bit2 TXBRK:Transmitbreakcharacter 0:Nobreakcharacteristransmitted 1:Breakcharacterstransmit TheTXBRKbitistheTransmitBreakCharacterbit.Whenthisbitis“0”,thereare nobreakcharactersandtheTXpinoperatesnormally.Whenthebitis“1”,thereare transmitbreakcharactersandthetransmitterwillsendlogiczeros.Whenthisbitis equalto“1”,afterthebuffereddatahasbeentransmitted,thetransmitteroutputisheld lowforaminimumofa13-bitlengthanduntiltheTXBRKbitisreset. Bit1 RX8:Receivedatabit8for9-bitdatatransferformat(readonly) Thisbitisonlyusedif9-bitdatatransfersareused,inwhichcasethisbitlocationwill storethe9thbitofthereceiveddataknownasRX8.TheBNObitisusedtodetermine whetherdatatransfersarein8-bitor9-bitformat. Bit0 TX8:Transmitdatabit8for9-bitdatatransferformat(writeonly) Thisbitisonlyusedif9-bitdatatransfersareused,inwhichcasethisbitlocation willstorethe9thbitofthetransmitteddataknownasTX8.TheBNObitisusedto determinewhetherdatatransfersarein8-bitor9-bitformat. UCR2 Register TheUCR2registeristhesecondofthetwoUARTcontrolregistersandservesseveralpurposes.One ofitsmainfunctionsistocontrolthebasicenable/disableoperationoftheUARTTransmitterand ReceiveraswellasenablingthevariousUARTinterruptsources.Theregisteralsoservestocontrol thebaudratespeed,receiverwake-upenableandtheaddressdetectenable.Furtherexplanationon eachofthebitsisgivenbelow: Bit 7 6 5 4 3 2 1 0 �a�e TXE� RXE� BRGH ADDE� WAKE RIE TIIE TEIE R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7 TXEN:UARTTransmitterenabledcontrol 0:UARTtransmitterisdisabled 1:UARTtransmitterisenabled ThebitnamedTXENistheTransmitterEnableBit.Whenthisbitisequalto“0”,the transmitterwillbedisabledwithanypendingdatatransmissionsbeingaborted.In additionthebufferswillbereset.InthissituationtheTXpinwillbeusedasanI/Oor otherpin-sharedfunctionalpin. IftheTXENbitisequalto“1”andtheUARTENbitisalsoequalto“1”,the transmitterwillbeenabledandtheTXpinwillbecontrolledbytheUART.Clearing theTXENbitduringatransmissionwillcausethedatatransmissiontobeabortedand willresetthetransmitter.Ifthissituationoccurs,theTXpinwillbeusedasanI/Oor otherpin-sharedfunctionalpin. Bit6 RXEN:UARTReceiverenabledcontrol 0:UARTreceiverisdisabled 1:UARTreceiverisenabled ThebitnamedRXENistheReceiverEnableBit.Whenthisbitisequalto“0”,the receiverwillbedisabledwithanypendingdatareceptionsbeingaborted.Inaddition thereceivebufferswillbereset.InthissituationtheRXpinwillbeusedasanI/Oor otherpin-sharedfunctionalpin.IftheRXENbitisequalto“1”andtheUARTENbit isalsoequalto“1”,thereceiverwillbeenabledandtheRXpinwillbecontrolledby theUART.ClearingtheRXENbitduringareceptionwillcausethedatareceptionto beabortedandwillresetthereceiver.Ifthissituationoccurs,theRXpinwillbeused asanI/Oorotherpin-sharedfunctionalpin. |
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