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X9259 Datasheet(PDF) 1 Page - Xicor Inc.

Part # X9259
Description  Quad Digitally-Controlled (XDCP) Potentiometers
PDF  25 Pages
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Manufacturer  XICOR [Xicor Inc.]
Direct Link  http://www.xicor.com
Logo XICOR - Xicor Inc.

X9259 Datasheet(HTML) 1 Page - Xicor Inc.

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REV 1.2.3 4/30/02
Characteristics subject to change without notice.
1 of 25
www.xicor.com
X9259
Quad Digitally-Controlled (XDCPTM) Potentiometers
FEATURES
• Quad–Four separate potentiometers
• 256 resistor taps/pot–0.4% resolution
• 2-Wire Serial Interface for write, read, and
transfer operations of the potentiometer
• Wiper Resistance, 100
Ω typical @ VCC = 5V
• 4 Nonvolatile Data Registers for Each
Potentiometer
• Nonvolatile Storage of Multiple Wiper Positions
• Power On Recall. Loads Saved Wiper Position on
Power Up.
• Standby Current < 5µA Max
•VCC: 2.7V to 5.5V Operation
• 50K
Ω, 100KΩ versions of End to End Pot
Resistance
• Endurance: 100,000 Data Changes per Bit per
Register
• 100 yr. Data Retention
• Single Supply Version of X9258
• 24-Lead SOIC, 24-Lead TSSOP, 24-Lead XBGA
• Low Power CMOS
DESCRIPTION
The
X9259
integrates
4
digitally
controlled
potentiometer
(XDCP)
on
a
monolithic
CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 255 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the 2-Wire
bus interface. Each potentiometer has associated with
it a volatile Wiper Counter Register (WCR) and a four
nonvolatile Data Registers that can be directly written
to and read by the user. The contents of the WCR
controls the position of the wiper on the resistor array
though the switches. Powerup recalls the contents of
the default Data Register (DR0) to the WCR.
The
XDCP
can
be
used
as
a
three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
Single Supply / Low Power / 256-tap / 2-Wire bus
APPLICATION NOTES AND DEVELOPMENT SYSTEM
A V A I L A B L E
AN99 • AN115 • AN124 •AN133 • AN134 • AN135
FUNCTIONAL DIAGRAM
RH0
RL0
RW0
VCC
VSS
2-Wire
Bus
50K
Ω or 100KΩ versions
RH1
RL1
RW1
RH2
RL2
RW2
RH3
RL3
RW3
Power On Recall
Wiper Counter
Registers (WCR)
Data Registers
16 Bytes
Interface
Bus
Interface
and Control
Address
Data
Status
Write
Read
Transfer
Inc/Dec
Control


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