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ICX424AL Datasheet(PDF) 2 Page - Sony Corporation |
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ICX424AL Datasheet(HTML) 2 Page - Sony Corporation |
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2 / 29 page ![]() – 2 – ICX424AL Block Diagram and Pin Configuration (Top View) Pin No. Symbol Description Pin No. Symbol Description 1 2 3 4 5 6 7 8 V φ3 V φ2 V φ1 NC GND CGG GND VOUT Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock GND Output amplifier gate∗1 GND Signal output 9 10 11 12 13 14 15 16 VDD SUBCIR GND φSUB VL φRG H φ1 H φ2 Supply voltage Supply voltage for the substrate voltage generation GND Substrate clock Protective transistor bias Reset gate clock Horizontal register transfer clock Horizontal register transfer clock Pin Description ∗1 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 1000pF. Note) Note) : Photo sensor 8 7 6 5 4 3 2 1 11 12 13 14 15 16 10 9 Horizontal register |
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