80960JD datasheet(45/78 Pages) INTEL

45 / 78 page

Advance Information Datasheet

80960JA/JF/JD/JT 3.3 V Microprocessor

SYNCHRONOUS INPUT TIMINGS

TIS1

Input Setup to CLKIN — AD31:0, NMI,

XINT7:0

80960JT

80960JD

80960JA/JF

(5)

TIH1

Input Hold from CLKIN — AD31:0, NMI,

XINT7:0

80960JT

80960JD

80960JA/JF

1.5

1.0

(5)

TIS2

Input Setup to CLKIN — RDYRCV and

HOLD

80960JT

80960JD

80960JA/JF

6.5

10.0

(6)

TIH2

Input Hold from CLKIN — RDYRCV and

HOLD

1ns

(6)

TIS3

Input Setup to CLKIN — RESET

80960JT

80960JD

80960JA/JF

(7)

TIH3

Input Hold from CLKIN — RESET

80960JT

80960JD

80960JA/JF

(7)

TIS4

Input Setup to RESET — ONCE, STEST

80960JT

80960JD

80960JA/JF

(8)

TIH4

Input Hold from RESET — ONCE, STEST

80960JT

80960JD

80960JA/JF

(8)

RELATIVE OUTPUT TIMINGS

TLX

Address Valid to ALE/ALE Inactive

For 3.3 V Data Input Signals

For 5.0 V Data Input Signals

0.5TC - 5

0.5TC - 8

(9)

TLXL

ALE/ALE Width

0.5TC - 7

Equal Loading (9)

TLXA

Address Hold from ALE/ALE Inactive

TDXD

DT/R Valid to DEN Active

BOUNDARY SCAN TEST SIGNAL TIMINGS

TBSF

TCK Frequency

0.5TF

MHz

TBSCH

TCK High Time

Measured at 1.5 V

(1)

TBSCL

TCK Low Time

Measured at 1.5 V

(1)

TBSCR

TCK Rise Time

0.8 V to 2.0 V (1)

TBSCF

TCK Fall Time

2.0 V to 0.8 V (1)

Table 23.

80960Jx AC Characteristics (Sheet 2 of 3)

Symbol

Parameter

Min

Max

Unit

Notes

NOTE:

See Table 24 on page 47 for note definitions for this table.

80960JD Datasheet(PDF) 45 Page - Intel Corporation

80960JD Datasheet(HTML) 45 Page - Intel Corporation

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