GLT44016 datasheet(5/17 Pages) ETC

5 / 17 page

G -LINK

GLT44016

256K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT

Aug, 2000(Rev.3.1)

G-Link Technology Corporation

2701Northwestern Parkway

Santa Clara, CA 95051, U.S.A.

G-Link Technology Corporation,Taiwan

6F, No. 24-2, Industry E. RD. IV, Science Based

Industrial Park, Hsin Chu, Taiwan.

- 5 -

DC and Operating Characteristics (1-2)

TA = 0

°C to 70°C, V

CC=5V

±10%, V

SS=0V, unless otherwise specified.

Sym.

Parameter

Test Conditions

Access

Time

Min.

Typ

Max. Unit Notes

ILI

Input Leakage Current

(any input pin)

≤ V

≤ 5.5V

(All other pins not under

test=0V)

-10

+10

µA

ILO

Output Leakage Current

(for High-Z State)

≤ V

out

≤ 5.5V

Output is disabled (Hiz)

-10

+10

µA

ICC1

Operating Current,

Random READ/WRITE

tRC = tRC (min.)

tRAC = 25ns

tRAC = 28ns

tRAC = 30ns

tRAC = 35ns

tRAC = 40ns

tRAC = 50ns

270

250

210

190

170

1,2

ICC2

Standby Current,(TTL)

RAS , UCAS , LCAS at V

other inputs

≥V

ICC3

Refresh Current,

RAS -Only

RAS cycling, UCAS ,

LCAS at V

tRC = tRC (min.)

tRAC = 25ns

tRAC = 28ns

tRAC = 30ns

tRAC = 35ns

tRAC = 40ns

tRAC = 50ns

270

250

210

190

170

ICC4

Operating Current,

EDO Page Mode

RAS at V

IL, UCAS , LCAS

address cycling:tPC=tPC(min.)

tRAC = 25ns

tRAC = 28ns

tRAC = 30ns

tRAC = 35ns

tRAC = 40ns

tRAC = 50ns

270

250

210

190

170

1,2

ICC5

Refresh Current,

CAS Before RAS

RAS , UCAS , LCAS

address cycling:

tRC=tRC (min.)

tRAC = 25ns

tRAC = 28ns

tRAC = 30ns

tRAC = 35ns

tRAC = 40ns

tRAC = 50ns

270

250

210

190

170

ICC6

Standby Current, (CMOS)

RAS

≥V

CC-0.2V,

UCAS

≥V

CC-0.2V,

LCAS

≥V

CC-0.2V,

All other inputs VSS

VIL

Input Low Voltage

-1

+0.8

VIH

Input High Voltage

2.4

VCC+1

VOL

Output Low Voltage

IOL = 4.2mA

0.4

VOH

Output High Voltage

IOH = -5.0mA

2.4

Notes:

1.ICC is dependent on output loading when the device output is selected. Specified ICC(max.) is measured with the output open.

2.ICC is dependent upon the number of address transitions specified ICC(max.) is measured with a maximum of one transition per address cycle in

random Read/Write and EDO Fast Page Mode.

3.Specified VIL(min.) is steady state operation. During transitions VIL(min.) may undershoot to -1.0V for a period not to exceed 20ns. All AC

parameters are measured with VIL(min.)

≥V

SS and VIH(max.)

≤V

CC.

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