LT4351CMS datasheet(12/20 Pages) LINER

12 / 20 page

LT4351

sn4351 4351fs

As an example, for 500nH of inductance and RESR of about

100m

Ω, then:

≥=

4 500

200

•

Check vendor data for ESR and iterate to get the best

value. Additional CB capacitance may be required for load

concerns.

If the boost regulator is being used, place a 10

µF low ESR

ceramic capacitor from VIN to GND. Place a 10µF and a

0.1

µF ceramic capacitor close to VIN and GND. These

capacitors should have low ESR (less than 10m

Ω for the

µF and 40mΩ for the 0.1µF). These capacitors help to

eliminate problems associated with noise produced by the

boost regulator. They are decoupled from the VIN supply

by a small 1

Ω resistor as shown in Figure 8. The LT4351

will perform better with a small ceramic capacitor (10

µF)

on OUT to GND.

Back-to-back MOSFETs prevent the MOSFET body diode

from passing current.

Use a single MOSFET if current flow is allowable from

input to output when the input supply is above the output

(limited overvoltage protection). In this case the MOSFET

should have a source on the input side so the body diode

conducts current to the load. Back-to-back MOSFETs are

normally connected with their sources tied together to

provide added protection against exceeding maximum

gate to source voltage.

Selection of MOSFETs should be based on RDS(ON), BVDSS

and BVGSS. BVDSS should be high enough to prevent

breakdown when VIN or OUT are at their maximum value.

RDS(ON) should be selected to keep within the MOSFET

power rating at the maximum load current (I2 • RDS(ON))

BVGSS should be at least 8V. The LT4351 will clamp the

GATE to 7.5V above the lesser of VIN or OUT. For back-to-

back MOSFETs where sources are tied together, this

allows the use of MOSFETs with a VGS max rating of 8V or

more. If a single MOSFET is used, care must be taken to

ensure the VGS max rating is not exceeded. When the

MOSFET is turned off, the GATE voltage is near ground, the

source at VIN. Thus, MOSFET VGS max must be greater

than VIN(MAX).

If a single MOSFET is used with source to VIN, then BVGSS

should be greater than the maximum VINsince the MOSFET

gate is at 0.2V when off.

The gate drive amplifier will attempt to regulate the

voltage across the MOSFETs to 15mV. Regulation will be

achieved if:

LOAD

2•

for two MOSFETs and

LOAD

for a single MOSFET

This requires very low RDS values. This may be achieved

by paralleling MOSFETs, but be careful to keep intercon-

nection trace resistance low. In the event that regulation

cannot be achieved, the gate drive amplifier will drive

GATE to its clamp and achieve the best RDS possible at that

level.

APPLICATIO S I FOR ATIO

Figure 8. VIN Capacitors

External Boost Supply

The VDD pin may be powered by an external supply. In this

case, simply omit the boost regulator inductor and diode

and leave the SW pin open. Suitable VDD capacitance

(minimum of a 1

µF ceramic) should remain due to the cur-

rent pulses required for the gate driver.

The VDD current consists of 3.5mA of DC current with the

current required to charge the MOSFET’s gate which is de-

pendent on the gate charge required and frequency of

switching. Typically the average current will be under 10mA.

MOSFET Selection

The LT4351 uses either a single N-channel MOSFET or

back-to-back N-channel MOSFETs as the pass element.

VIN

Ω

CV3

µF

CV1

µF

LIN

PARASITIC

CV2

0.1

µF

VIN

GATE

LT4351

4351 F08

GND

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