TC90101FG datasheet(21/36 Pages) TOSHIBA

21 / 36 page

Feb./2005

TC90101FG

●Additional information about IIC registers.

BUS address

Function

Contents

00H：D7-D6

Input signal selection. An input signal is chosen.

00H：D5-D2

Select TVM.

The TV-system is fixed forcibly.

It uses when it is worked in the manual.

00H：D1-D0

Color system detection

mode.

Setup Color system detection mode.

Manual / Europeian / South American / Full auto detection.

01H：D7

Setup for YCS.

3-lineComb or BPF is chosen.

0: 3-line-Comb

1: B.P.F

01H：D5-D4

Select clock

Setup for an output clock frequency.

Select

“601：13.5MHz” or “656：27MHz”.

01H：D3

Select OUTPUT FORMAT

Setup for an output format (601or656).

01H：D2

Select OUTBITS

Setup for an output bits range (8bit or 10bit).

01H：D1

Digital-Output Control

Each digital output terminals are controlled.

0：Active

1：OPEN (Because it becomes Hi Impedance,

coexistence with other IC's is possible.）

01H：D0

ADC-Power Control

The control of the power supply for ADC.

0：The power supply of ADC is turned off.

1：Normal (It usually uses by this setup.)

02H：D7-D6

Set V Enhance Gain

Gain (off, 1/8, 1/4 and 1/2) is set up.

02H：D5-D4

Set V Enhance non-

liner point.

Setup the characteristic of V-enhance gain for non- correlation

Component. Choose it from 4 point

02H：D3-D2

Set V Enhance coring

Choose Coring(No response level).

02H：D1

Set

“f0” of sharpness

Set f0 of Sharpness.

It works with f0 of Noise-canceler as well together.

02H：D0

Select Pre-Enhance

Pre-Enhance makes it control the part Edgy of Sharpness.

03H：D7-D4

Adjustment Sharpness

Gain.

Control the Gain of Sharpness.

1011：-1/4 ∼

1111：OFF ∼

0111：8/16

1000, 1001 and 1010 can't be used.

03H：D3-D2

Set Sharpness-coring

-Level.

Choose Coring(No response level).

03H：D1

Set the Feed-Back

CLAMP

Set the Feed-Back CLAMP.

0: Auto. It becomes a diode clamp when TC90101FG detects a

non-signal.

1：Feed-Back Clamp is active.

03H：D0

Change the Feed-Back

CLAMP

Select Internal-Feed-Back or External-Feed-Back.

0: External mode (Pin74, 75 outputs clamp signal).

1: Internal mode (Pin74, 75 : Open). The time-constant for

internal feedback clamp is set via BUS_FBCLMOD at sub address 32 hex.

04H：D7-D6

Set Noise canceler

Gain

Set the Gain of NOISE-CANCEL.

04H：D5

Set LTI f0

Set the f0 of LTI.

04H：D4

Set CTI f0

Set the f0 of CTI.

04H：D3-D0

Cb & Cr delay adjust. Fine tune for delay of Cb & Cr.

Step is 37[ns] between -296ns∼259ns.

But step is 74[ns] at YCbCr input mode.

05H：D7-D6

LTI Gain adjustment

It set the Gain of LTI.

05H：D5-D4

LTI coring Level

It set the Coring(No response level) of LTI.

Use after you confirm a picture.

05H：D3-D2

CTI Gain adjustment

It set the Gain of CTI.

05H：D1-D0

CTI coring Level

It set the Coring(No response level) of CTI.

TC90101FG Datasheet(PDF) 21 Page - Toshiba Semiconductor

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