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AD5251/AD5252

Rev. 0 | Page 22 of 28

LAYOUT AND POWER SUPPLY BIASING

It is always a good practice to employ a compact, minimum

lead-length layout design. The leads to the input should be as

direct as possible, with a minimum conductor length. Ground

paths should have low resistance and low inductance.

Similarly, it is also good practice to bypass the power supplies

with quality capacitors. Low equivalent series resistance (ESR)

1 µF to 10 µF tantalum or electrolytic capacitors should be

applied at the supplies to minimize any transient disturbance

and filter low frequency ripple. Figure 39 illustrates the basic

supply bypassing configuration for the AD5251/AD5252.

VDD

VSS

GND

AD5251/AD5252

µF

0.1

µF

0.1

µF

Figure 39. Power Supply Bypassing

The ground pin of the AD5251/AD5252 is used primarily as a

digital ground reference. To minimize the digital ground

bounce, the AD5251/AD5252 ground terminal should be joined

remotely to the common ground (see Figure 39).

DIGITAL POTENTIOMETER OPERATION

The structure of the RDAC is designed to emulate the

performance of a mechanical potentiometer. The RDAC

contains a string of resistor segments, with an array of analog

switches acting as the wiper connection to the resistor array.

The number of points is the resolution of the device. For

example, the AD5251/AD5252 emulates 64 or 256 connection

points with 64 or 256 equal resistance, RS, allowing it to provide

better than 1.5%/0.4% settability resolution.

Figure 40 provides an equivalent diagram of the connections

between the three terminals that make up one channel of the

RDAC. Switches SWA and SWB are always ON, while one of

switches SW(0) to SW(2N–1) is ON one at a time, depending on

the setting decoded from the data bit. Because the switches are

nonideal, there is a 75 Ω wiper resistance, RW. Wiper resistance

is a function of supply voltage and temperature; lower supply

voltages and higher temperatures result in higher wiper

resistances. Consideration of wiper resistance dynamics is

important in applications where accurate prediction of output

resistance is required.

SWB

SW(1)

SW(0)

SWA

SW(2N–1)

SW(2N–2)

RDAC

WIPER

AND

DECODER

RS = RAB/2N

DIGITAL

CIRCUITRY

OMITTED FOR

CLARITY

Figure 40. Equivalent RDAC Structure

PROGRAMMABLE RHEOSTAT OPERATION

If either the W-to-B or W-to-A terminal is used as a variable

resistor, the unused terminal can be opened or shorted with W;

such operation is called rheostat mode (see Figure 41). The

resistance tolerance can range ± 20%.

Figure 41. Rheostat Mode Configuration

The nominal resistance of the AD5251/AD5252 has 64 or 256

contact points accessed by the wiper terminal, plus the

B terminal contact. The 6-or 8-bit data-word in the RDAC

wiper’s first connection starts at the B terminal for Data 0x00.

This B-terminal connection has a wiper contact resistance, RW,

of 75 Ω, regardless of the nominal resistance. The second

connection (the AD5251 10 kΩ part) is the first tap point where

RWB = 231 Ω (RWB = RAB/64 + RW = 156 Ω + 75 Ω) for Data

0x01, and so on. Each LSB data value increase moves the wiper

up the resistor ladder until the last tap point is reached at

RWB = 9893 Ω. See Figure 40 for a simplified diagram of the

equivalent RDAC circuit.

The general equation that determines the digitally programmed

output resistance between W and B, is

AD5251: RWB(D) = (D/64) × RAB + 75 Ω

(1)

AD5252: RWB(D) = (D/256) × RAB + 75 Ω

(2)

Where D is the decimal equivalent data contained in the RDAC

latch and RAB is the nominal end-to-end resistance.

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