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ADT7460 Datasheet(PDF) 39 Page - Analog Devices |
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ADT7460 Datasheet(HTML) 39 Page - Analog Devices |
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39 / 48 page ![]() REV. 0 ADT7460 –39– Table XX. Register 0x62 – Enhance Acoustics Register 1 (Power-On Default = 0x00) Bit Name R/W * Description <2:0> ACOU Read/Write These bits select the Ramp Rate applied to the PWM1 output. Instead of PWM1 jumping instantaneously to its newly calculated speed, PWM1 will ramp gracefully at the rate determined by these bits. This feature enhances the acoustics of the fan being driven by the PWM1 output. Time Slot Increase Time for 33% to 100% 000 = 1 35 s 001 = 2 17.6 s 010 = 3 1.8 s 011 = 5 7 s 100 = 8 4.4 s 101 = 12 3 s 110 = 24 1.6 s 111 = 48 0.8 s <3> EN1 Read/Write When this bit is 1, Acoustic Enhancement is enabled on PWM1 output. <4> SYNC Read/Write SYNC = 1 synchronizes fan speed measurements on TACH2, TACH3, and TACH4 to PWM3. This allows up to three fans to be driven from PWM3 output and their speeds to be measured. SYNC = 0, only TACH3 and TACH4 are synchronized to PWM3 output. <5> MIN1 Read/Write When the ADT7460 is in Automatic Fan Control Mode, this bit defines whether PWM1 is off (0% duty cycle) or at PWM 1 Minimum Duty Cycle when the controlling temperature is below its TMIN – Hysteresis value. 0 = 0% duty cycle below TMIN – Hysteresis 1 = PWM 1 Minimum Duty Cycle below TMIN – Hysteresis <6> MIN2 Read/Write When the ADT7460 is in Automatic Fan Speed Control Mode, this bit defines whether PWM 2 is off (0% duty cycle) or at PWM 2 Minimum Duty Cycle when the controlling temperature is below its TMIN – Hysteresis value. 0 = 0% duty cycle below TMIN – Hysteresis 1 = PWM 2 Minimum Duty Cycle below TMIN – Hysteresis <7> MIN3 Read/Write When the ADT7460 is in Automatic Fan Speed Control Mode, this bit defines whether PWM 3 is off (0% duty cycle) or at PWM 3 Minimum Duty Cycle when the controlling temperature is below its TMIN – Hysteresis value. 0 = 0% duty cycle below TMIN – Hysteresis 1 = PWM 3 Minimum Duty Cycle below TMIN – Hysteresis *This register becomes read-only when the Configuration Register 1 Lock bit is set to 1. Any further attempts to write to this register will have no effect. |
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