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ADV7202 Datasheet(PDF) 16 Page - Analog Devices |
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ADV7202 Datasheet(HTML) 16 Page - Analog Devices |
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16 / 29 page ![]() REV. 0 ADV7202 –15– XTAL0 DATA DOUT [9:0] DATA DATA DATA DATA DATA DATA DATA Figure 14. Standard Mode Digital Data O/P Format REGISTER PROGRAMMING The following section describes the functionality of each register. All registers can be read from as well as written to. Subaddress Register (SR7–SR0) The Communications Register is an 8-bit write-only register. After the part has been accessed over the bus, and a read/write operation is selected, the subaddress is set up. The Subaddress Register determines to/from which register the operation takes place. Figure 15 shows the various operations under the control of the Subaddress Register. “0” should always be written to SR7. Register Select (SR6–SR0) These bits are set up to point to the required starting address. SR4 SR3 SR2 SR1 SR0 SR6 SR5 ADDRESS SR6 SR5 SR4 SR3 SR2 SR1 SR0 00h 0 00 0000 MODE REGISTER 0 01h 0 00 0001 MODE REGISTER 1 02h 0 00 0010 MODE REGISTER 2 03h 0 00 0011 MODE REGISTER 3 04h 0 00 0100 AGC REGISTER 0 05h 0 00 0101 AGC REGISTER 1 06h 0 00 0110 CLAMP REGISTER 0 07h 0 00 0111 CLAMP REGISTER 1 08h 0 00 1000 CLAMP REGISTER 2 09h 0 00 1001 CLAMP REGISTER 3 0Ah 0 00 1010 TIMING REGISTER 0Bh 0 00 1011 VREF ADJUST REGISTER 0Ch 0 00 1100 RESERVED 0Dh 0 00 1101 RESERVED 0Eh0 00 1110 RESERVED 0Fh0 00 1111 RESERVED 10h 0 01 0000 AUX REGISTER 0 11h 0 01 0001 AUX REGISTER 1 12h 0 01 0011 AUX REGISTER 2 13h 0 01 0000 AUX REGISTER 3 14h 0 01 0100 AUX REGISTER 4 15h 0 01 0101 AUX REGISTER 5 16h 0 01 0110 AUX REGISTER 6 17h 0 01 0111 AUX REGISTER 7 ADV7202 REGISTER SR7 Figure 15. Subaddress Registers REGISTER ACCESS The MPU can write to or read from all of the registers of the ADV7202 except the Subaddress Registers, which are write-only. The Subaddress Register determines which register the next read or write operation accesses. All communications with the part through the bus start with an access to the Subaddress Register. A read/write operation is then performed from/to the target address which then increments to the next address until a Stop command on the bus is performed. |
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