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ADV7202 Datasheet(PDF) 3 Page - Analog Devices |
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ADV7202 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 29 page  REV. 0 –2– ADV7202–SPECIFICATIONS 5 V SPECIFICATIONS (AVDD/DVDD = 5 V 5%, V REF = 1.235 V, RSET = 1.2 k , all specifications TMIN to TMAX 1, unless otherwise noted.) Parameter Min Typ Max Unit Test Conditions STATIC PERFORMANCE_DAC Resolution (Each DAC) 10 Bits Accuracy (Each DAC) 10 Bits Integral Nonlinearity ±0.6 LSB 10-Bit Operation Differential Nonlinearity –1.5 –0.6/0.1 +0.5 LSB 10-Bit Operation VIDEO ADC Resolution 12 Bits (Including 2 Bits for Gain Ranging) 2.2 V Ref. Accuracy 12 Bits Integral Nonlinearity ±2.5 LSB 12 Bit Differential Nonlinearity ±0.7 LSB 12 Bit Input Voltage Range 2 –VREFADC +VREFADC SNR 62 dB 27 MHz Clock 57 dB 54 MHz Clock AUX ADC Resolution 8 Bits Differential Nonlinearity ±0.4 LSB Guaranteed No Missing Codes Integral Nonlinearity ±0.4 LSB Input Voltage Range 0 2 VREFADC V DIGITAL INPUTS Input High Voltage, VINH 2V Input Low Voltage, VINL 0.8 V Input Leakage Current, IIN ±2 µA Input Capacitance, CIN 6pF DIGITAL OUTPUTS Output High Voltage, VOH 2.4 V ISOURCE = 400 µA Output Low Voltage, VOL 0.4 V ISINK = 1.6 mA Three-State Leakage Current 10 µA Output Capacitance 10 pF Digital Output Access Time, t14 6ns See Figure 13 Digital Output Hold Time, t15 5ns ANALOG OUTPUTS Output Current Range 4.10 4.33 4.6 mA RSET = 1.2 k Ω, RL = 300 Ω DAC-to-DAC Matching 3 % Output Compliance, VOC 0 1.4 V Output Impedance, ROUT 50 k Ω Output Capacitance, COUT 30 pF IOUT = 0 mA Analog Output Delay 3 5.5 ns DAC Output Skew 0.06 ns VOLTAGE REFERENCE Reference Range, VREFDAC 1.17 1.235 1.30 V Reference Range, VREFADC 2.1 2.2 2.30 V Programmable 1.1 V or 2.2 V Reference Range, VREFADC 1.1 V NOTES 10 °C to 70°C. 2SHA gain = 1, half range for SHA gain = 2, see Table II. 3Output delay measured from 50% of the rising edge of the clock to the 50% point of full-scale transition. Specifications subject to change without notice. |
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