AD7781

Rev. 0 | Page 12 of 16

POWER-DOWN/RESET (PDRST)

The PDRST pin functions as a power-down pin and a reset pin.

When PDRST is taken low, the AD7781 is powered down. The

entire ADC is powered down (including the on-chip clock), the

low-side power switch is opened, and the DOUT/RDY pin is

tristated. The circuitry and serial interface are also reset, which

resets the logic, the digital filter, and the analog modulator.

PDRST must be held low for 100 ns minimum to initiate the

reset function (see

).

Figure 4

When PDRST is taken high, the AD7781 is taken out of power-

down mode. When the on-chip clock has powered up (1 ms,

typically), the modulator begins sampling the analog input.

The low-side power switch is closed, and the DOUT/RDY pin

becomes active.

A reset is automatically performed on power-up.

ANALOG INPUT CHANNEL

The AD7781 has one differential analog input channel. The

input channel feeds into a high impedance input stage of the

amplifier. Therefore, the input can tolerate significant source

impedances and is tailored for direct connection to external

resistive-type sensors such as strain gages.

The absolute input voltage range is restricted to a range between

up the common-mode voltage to avoid exceeding these limits.

Otherwise, there is degradation in linearity and noise performance.

The low noise in-amp means that signals of small amplitude can

be amplified within the AD7781, which still maintains excellent

noise performance. The amplifier can be configured to have a gain

of 128 or 1, using the GAIN pin. The analog input range is equal

must be ≥0.5 V.

BIPOLAR CONFIGURATION

The AD7781 accepts a bipolar input range. A bipolar input range

does not imply that the part can tolerate negative voltages with

respect to system GND. Signals on the AIN(+) input are refer-

enced to the voltage on the AIN(−) input. For example, if AIN(−)

is 2.5 V, the analog input range on the AIN(+) input is 2.46 V to

2.54 V for a gain of 128.

DATA OUTPUT CODING

The AD7781 uses offset binary coding. Thus, a negative full-

scale voltage results in a code of 000...000, a zero differential

input voltage results in a code of 100...000, and a positive full-

scale input voltage results in a code of 111...111.

The output code for any analog input voltage can be represented as

where:

AIN is the analog input voltage.

Gain is 1 or 128.

N = 20.

REFERENCE

The AD7781 has a fully differential input capability for the channel.

The common-mode range for these differential inputs is GND to

source impedances introduce gain errors. The reference voltage of

tions where the excitation (voltage or current) for the transducer

on the analog input also drives the reference voltage for the part,

the effect of the low frequency noise in the excitation source is

removed because the application is ratiometric. If the AD7781

is used in a nonratiometric application, a low noise reference

should be used.

Recommended 2.5 V reference voltage sources for the AD7781

include the ADR381 and ADR391, which are low noise, low power

references. These references have low output impedances and

are, therefore, tolerant to decoupling capacitors on REFIN(+)

without introducing gain errors in the system. Deriving the

reference input voltage across an external resistor means that

the reference input sees a significant external source impedance.

External decoupling on the REFIN pins is not recommended in

this type of circuit configuration.

BRIDGE POWER-DOWN SWITCH

The bridge power-down switch (BPDSW) is useful in battery-

powered applications where the optimization of system power

consumption is essential. A 350 Ω load cell typically consumes

15 mA when excited with a 5 V power supply. To minimize

current consumption, the load cell is disconnected when it is

not being used. The bridge power-down switch can be included

in series with the load cell. When PDRST is high, the bridge power-

down switch is closed, and the load cell measures the strain. When

PDRST is low, the bridge power-down switch is opened so no

current flows through the load cell. Therefore, the current

consumption of the system is minimized. The bridge power-

down switch has an on resistance of 9 Ω maximum. The switch

is capable of withstanding 30 mA of continuous current.