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AD7923

–3–

REV. 0

Parameter

B Version

Unit

Test Conditions/Comments

CONVERSION RATE

Conversion Time

800

ns max

16 SCLK Cycles with SCLK at 20 MHz

Track-and-Hold Acquisition Time

300

ns max

Sine Wave Input

300

ns max

Full-Scale Step Input

Throughput Rate

200

kSPS max

See Serial Interface Section

POWER REQUIREMENTS

AVDD

2.7/5.25

V min/max

VDRIVE

2.7/5.25

V min/max

IDD

Digital I/Ps = 0 V or VDRIVE

During Conversion

2.7

mA max

AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz

2.0

mA max

AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz

Normal Mode (Static)

600

mA typ

AVDD = 2.7 V to 5.25 V, SCLK On or Off

Normal Mode (Operational) fSAMPLE = 200 kSPS

1.5

mA max

AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz

1.2

mA max

AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz

Using Auto Shutdown Mode fSAMPLE = 200 kSPS

900

mA typ

AVDD = 4.75 V to 5.25 V, fSAMPLE = 200 kSPS

650

mA typ

AVDD = 2.7 V to 3.6 V, fSAMPLE = 200 kSPS

Auto Shutdown (Static)

0.5

mA max

SCLK On or Off (20 nA typ)

Full Shutdown Mode

0.5

mA max

SCLK On or Off (20 nA typ)

Power Dissipation

Normal Mode (Operational) fSAMPLE = 200 kSPS

7.5

mW max

AVDD = 5 V, fSCLK = 20 MHz

3.6

mW max

AVDD = 3 V, fSCLK = 20 MHz

Auto Shutdown (Static)

2.5

mW max

AVDD = 5 V

1.5

mW max

AVDD = 3 V

Full Shutdown Mode

2.5

mW max

AVDD = 5 V

1.5

mW max

AVDD = 3 V

NOTES

1Temperature ranges as follows: B Version: –40

∞C to +85∞C.

2See Terminology section.

3Sample tested @ 25

∞C to ensure compliance.

4See Power versus Throughput Rate section.

Specifications subject to change without notice.

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