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SN65MLVD128 Datasheet(PDF) 13 Page - Texas Instruments |
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SN65MLVD128 Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 16 page ![]() SN65MLVD128 SN65MLVD129 SLLS586 − MARCH 2004 www.ti.com 13 APPLICATION INFORMATION CLOCK DISTRIBUTION Figure 17 Output Duty cycle = 49.97%. Vertical scale = 142 mV/div Horizontal scale = 11 ns/div SN65MLVD128 Output Input Source: 19.6608 MHz Clock With 50% Duty Cycle, VCC = 3.3 V, RL = 50 W, CL = 2.5 pF Figure 18 Output duty cycle = 50.01%. Vertical scale = 142 mV/div Horizontal scale = 4 ns/div SN65MLVD128 Output Input Source: 61.44 MHz Clock With 50% Duty Cycle, VCC = 3.3 V, RL = 50 W, CL = 2.5 pF DATA DISTRIBUTION Figure 19 Vertical scale = 150 mV/div Horizontal scale = 1.21 ns/div SN65MLVD128 Output Input Source: 250 Mbps, 215−1 PRBS, VCC = 3.3 V, RL = 50 W, CL = 2.5 pF |
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