TABLE 4. Suggested Capacitors and Their Suppliers

Model

Type

Vendor

Phone

FAX

4.7 µF for C1, C2 (Input or Output Capacitor)

JMK212BJ475MG

Ceramic

Taiyo-Yuden

847-925-0888

847-925-0899

LMK316BJ475ML

Ceramic

Taiyo-Yuden

847-925-0888

847-925-0899

C2012X5R0J475K

Ceramic

TDK

847-803-6100

847-803-6296

The input filter capacitor supplies current to the PFET switch

of the LM2706 in the first part of each cycle and reduces

voltage ripple imposed on the input power source. The out-

put filter capacitor smooths out current flow from the inductor

to the load, helps maintain a steady output voltage during

transient load changes and reduces output voltage ripple.

These capacitors must be selected with sufficient capaci-

tance and sufficiently low ESR to perform these functions.

The ESR, or equivalent series resistance, of the filter capaci-

tors is a major factor in voltage ripple. The contribution from

ESR to voltage ripple is around 75%–95% for most types of

electrolytic capacitors, and less for ceramic capacitors. The

remainder of the ripple is from charge storage due to capaci-

tance.

OPERATING MODE SELECTION

Drive the ABD and BYP pins using the system controller to

set the operating mode of the LM2706. See Table 1 for the

pin settings and corresponding operating modes. Use a

comparator, Schmitt trigger or logic gate to drive the ABD

and BYP pins. Drive the pins below 0.5V for a low logic level

and above 1.2V for a high logic level. In systems where

operation in Automatic Bypass mode is desired and digital

control of operating modes is unnecessary, connect ABD

and BYP to SGND. ABD and BYP have pull-down currents

and will default to Automatic Bypass mode if left floating.

EN PIN CONTROL

Drive the EN pin using the system controller to turn the

LM2706 ON and OFF. Use a comparator, Schmitt trigger or

down mode.

Set EN low to turn off the LM2706 during power-up and

under voltage conditions when the supply is less than the

2.7V minimum operating voltage. The LM2706 is designed

for mobile phones where the system controller controls op-

eration mode for maximizing battery life and requirements

for small package size outweigh the additional size required

for inclusion of UVLO (Under Voltage Lock-Out) circuitry.

micro SMD PACKAGE ASSEMBLY AND USE

Use of the micro-SMD package requires specialized board

layout, precision mounting and careful reflow techniques, as

detailed in National Semiconductor Application Note 1112.

Refer to the section Surface Mount Technology (SMT) As-

sembly Considerations. For best results in assembly, align-

ment ordinals on the PC board should be used to facilitate

placement of the device.

The pad style used with Micro SMD package must be the

NSMD (non-solder mask defined) type. This means that the

solder-mask opening is larger than the pad size. This pre-

vents a lip that otherwise forms if the solder-mask and pad

overlap, from holding the device off the surface of the board

and interfering with mounting. See Applications Note 1112

for specific instructions how to do this.

The 10-Bump package used for the LM2706 has 300 micron

solder balls and requires 10.82 mil pads for mounting on the

circuit board. The trace to each pad should enter the pad

with a 90˚ entry angle to prevent debris from being caught in

deep corners. Initially, the trace to each pad should be

6–7 mil wide, for a section approximately 6 mil long, as a

thermal relief. Then each trace should neck up or down to its

optimal width. The important criterion is symmetry. This en-

sures the solder bumps on the LM2706 re-flow evenly and

that the device solders level to the board. In particular,

special attention must be paid to the pads for bumps 6–8.

Because PGND and PV

copper planes, inadequate thermal relief’s can result in late

or inadequate reflow of these bumps.

The micro SMD package is optimized for the smallest pos-

sible size in applications with red or infrared opaque cases.

Because the micro SMD package lacks the plastic encapsu-

lation characteristic of larger devices, it is vulnerable to light.

Backside metallization and/or epoxy coating, along with

front-side shading by the printed circuit board, reduce this

sensitivity. However, the package has exposed die edges. In

particular, micro SMD devices are sensitive to light, in the

red and infrared range, shining n the package’s exposed die

edges.

Do not use or power-up the LM2706 while subjecting it to red

or infrared light otherwise degraded, unpredictable or erratic

operation may result. Examples of light sources with high red

or infrared content include the sun and halogen lamps. Pack-

age the circuit in a case opaque to red or infrared light.

BOARD LAYOUT CONSIDERATIONS

PC board layout is an important part of DC-DC converter

design. Poor board layout can disrupt the performance of a

DC-DC converter and surrounding circuitry by contributing to

EMI, ground bounce, and resistive voltage loss in the traces.

These can send erroneous signals to the DC-DC converter

IC, resulting in poor regulation or instability. Poor layout can

also result in reflow problems leading to poor solder joints

between the Micro SMD package and board pads. Poor

solder joints can result in erratic or degraded performance.

Good layout for the LM2706 can be implemented by follow-

ing a few simple design rules.

1. Place the LM2706 on 10.82 mil (10.82/1000 in.) pads. As

a thermal relief, connect to each pad with a 7 mil wide,

approximately 7 mil long traces, and then incrementally

increase each trace to its optimal width. The important

criterion is symmetry to ensure the solder bumps on the

LM2706 re-flow evenly (see Micro SMD Package Assem-

bly and Use).

2. Place the LM2706, inductor and filter capacitors close

together and make the traces short. The traces between

these components carry relatively high switching currents

www.national.com

13