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AD7634BSTZ Datasheet(PDF) 29 Page - Analog Devices |
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AD7634BSTZ Datasheet(HTML) 29 Page - Analog Devices |
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29 / 33 page ![]() AD7634 Data Sheet Rev. B | Page 28 of 32 External Clock Data Read After/During Conversion It is also possible to begin to read data after conversion and continue to read the last bits after a new conversion is initiated. This method allows the full throughput and the use of a slower SDCLK frequency. Again, it is recommended to use a discontinuous SDCLK whenever possible to minimize potential incorrect bit decisions. For the different modes, the use of a slower SDCLK, such as 20 MHz in warp mode, 15 MHz in normal mode, and 13 MHz in impulse mode, can be used. SDIN SDOUT D0 123 17 18 BUSY EXT/INT = 1 INVSCLK = 0 CS SDCLK 4 D2 D1 19 20 MODE[1:0] = 3 RD = 0 16 D17 D16 D15 X17 X16 21 X0 X2 X1 X17 X16 X15 Y17 Y16 t31 t31 X* t32 t16 t33 t34 t37 t35 t36 *A DISCONTINUOUS SDCLK IS RECOMMENDED. Figure 44. Slave Serial Data Timing for Reading (Read After Convert) SDOUT D0 123 BUSY EXT/INT = 1 INVSCLK = 0 CS SDCLK 17 D1 MODE[1:0] = 3 RD = 0 18 D17 D16 t31 t31 t32 t16 t37 t35 t36 CNVST X* X* X* X* X* X* t27 *A DISCONTINUOUS SDCLK IS RECOMMENDED. DATA = SDIN Figure 45. Slave Serial Data Timing for Reading (Read Previous Conversion During Convert) |
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