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AD7767 Datasheet(PDF) 3 Page - Analog Devices |
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AD7767 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 25 page ![]() AD7767 Rev. C | Page 2 of 2 4 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Related Devices ................................................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Timing Diagrams.......................................................................... 6 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Typical Performance Characteristics ........................................... 10 Terminology .................................................................................... 14 Theory of Operation ...................................................................... 15 AD7767/AD7767-1/AD7767-2 Transfer Function................ 15 Converter Operation.................................................................. 15 Analog Input Structure.............................................................. 16 Supply and Reference Voltages ................................................. 16 AD7767 Interface ........................................................................... 17 Initial Power-Up ......................................................................... 17 Reading Data............................................................................... 17 Power-Down, Reset, and Synchronization ............................. 17 Daisy Chaining ............................................................................... 18 Reading Data in Daisy-Chain Mode ....................................... 18 Choosing the SCLK Frequency ................................................ 18 Daisy-Chain Mode Configuration and Timing Diagrams ... 19 Driving the AD7767....................................................................... 20 Differential Signal Source ......................................................... 20 Single-Ended Signal Source ...................................................... 20 Antialiasing ................................................................................. 21 Power Dissipation....................................................................... 21 VREF+ Input Signal ....................................................................... 22 Multiplexing Analog Input Channels ...................................... 22 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 23 REVISION HISTORY 5/10—Rev. B to Rev. C Changes to Pin 8 Description......................................................... 9 Changes to Table 8.......................................................................... 20 3/09—Rev. A to Rev. B Changes to tSETTLING Parameter, Table 3.......................................... 5 Changes to Table 7.......................................................................... 17 1/09—Rev. 0 to Rev. A Changes to Features Section............................................................ 1 Change to Intermodulation Distortion (IMD) Parameter and Integral Nonlinearity Parameter, Table 2 ................................. 3 Changes to Supply and Reference Voltages Section................... 16 Changes to Choosing the SCLK Frequency Section.................. 18 Changes to Figure 24...................................................................... 12 Changes to Driving the AD7767 Section .................................... 20 Changes to Single-Ended Signal Source Section........................ 20 Added Figure 41; Renumbered Sequentially .............................. 20 Change to Figure 42 ....................................................................... 21 Added Table 8; Renumbered Sequentially .................................. 20 Replaced VREF+ Input Signal Section ............................................ 22 Replaced Figure 46 ......................................................................... 22 8/07—Revision 0: Initial Version |
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