AD7992 datasheet(28/29 Pages) AD

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AD7992

Rev. 0 | Page 27 of 28

SCL

7-BIT ADDRESS

COMMAND/ADDRESS

POINT BYTE

SDA

FIRST DATA BYTE

(MSBs)

SECOND DATA BYTE

(LSBs)

FIRST DATA BYTE

(MSBs)

SECOND DATA BYTE

(LSBs)

7-BIT ADDRESS

SDA

SCL

ACK BY

AD7992

ACK BY

AD7992

ACK BY

MASTER

ACK BY

MASTER

ACK BY

MASTER

ACK BY

AD7992

RESULT FROM CH1

RESULT FROM CH2

A/A

Figure 33. Mode 2 Sequence Operation

MODE 3—AUTOMATIC CYCLE MODE

An automatic conversion cycle can be selected and enabled by

writing a value to the cycle timer register. A conversion cycle

interval can be set up on the AD7992 by programming the

relevant bits in the 8-bit cycle timer register, as decoded in

Table 23. Only the 3 LSBs are used; the 5 MSBs should contain

0s (see the Sample Delay and Bit Trial Delay section). When the

3 LSBs of the register are programmed with any configuration

other than all 0s, a conversion takes place every X ms; the cycle

interval, X, depends on the configuration of these three bits in

the cycle timer register. There are seven different cycle time

intervals to choose from, as shown in Table 23. Once the

conversion has taken place, the part powers down again until

the next conversion occurs. To exit this mode of operation, the

user must program the 3 LSBs of the cycle timer register to

contain all 0s. For cycle interval options, see Table 23.

To select a channel(s) for operation in cycle mode, set the

corresponding channel bit(s), D5 to D4, of the configuration

sequence, starting with the lowest channel. Once the sequence

is complete, the ADC starts converting on the lowest channel

again, continuing to loop through the sequence until the cycle

timer register contents are set to all 0s. This mode is useful for

monitoring signals, such as battery voltage and temperature,

alerting only when the limits are violated.

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